Searched refs:stencil_offset (Results 1 – 14 of 14) sorted by relevance
| /third_party/libdrm/radeon/ |
| D | radeon_surface.h | 135 uint64_t stencil_offset; member
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| D | radeon_surface.c | 805 surf->stencil_offset = stencil_level[0].offset; in eg_surface_init_1d_miptrees()
828 surf->stencil_offset = stencil_level[0].offset; in eg_surface_init_2d_miptrees()
867 surf->stencil_offset = 0; in eg_surface_init()
1612 surf->stencil_offset = surf->stencil_level[0].offset; in si_surface_init_1d_miptrees()
1720 surf->stencil_offset = surf->stencil_level[0].offset; in si_surface_init_2d_miptrees()
1759 surf->stencil_offset = 0; in si_surface_init()
2324 surf->stencil_offset = surf->stencil_level[0].offset; in cik_surface_init_2d_miptrees()
2363 surf->stencil_offset = 0; in cik_surface_init()
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| /third_party/mesa3d/src/amd/common/ |
| D | ac_surface.h | 297 uint64_t stencil_offset; /* separate stencil */ member
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| D | ac_surface.c | 1745 surf->u.gfx9.zs.stencil_offset = align(surf->surf_size, out.baseAlign); in gfx9_compute_miptree()
1746 surf->surf_size = surf->u.gfx9.zs.stencil_offset + out.surfSize; in gfx9_compute_miptree()
2334 surf->u.gfx9.zs.stencil_offset = 0; in gfx9_compute_surface()
2920 if (surf->u.gfx9.zs.stencil_offset) in ac_surface_override_offset_stride()
2921 surf->u.gfx9.zs.stencil_offset += offset; in ac_surface_override_offset_stride()
3071 surf->u.gfx9.zs.stencil_offset, in ac_surface_print_info()
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| /third_party/mesa3d/src/intel/isl/ |
| D | isl.h | 1268 uint8_t stencil_offset; member
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| D | isl.c | 284 dev->ds.stencil_offset = in isl_device_init()
294 dev->ds.stencil_offset = 0; in isl_device_init()
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| /third_party/mesa3d/src/gallium/drivers/r600/ |
| D | evergreen_state.c | 1414 uint64_t stencil_offset; in evergreen_init_depth_surface() local
1419 stencil_offset = (uint64_t)rtex->surface.u.legacy.zs.stencil_level[level].offset_256B * 256; in evergreen_init_depth_surface()
1420 stencil_offset += rtex->resource.gpu_address; in evergreen_init_depth_surface()
1422 surf->db_stencil_base = stencil_offset >> 8; in evergreen_init_depth_surface()
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| /third_party/mesa3d/src/gallium/drivers/crocus/ |
| D | crocus_state.c | 7510 uint64_t stencil_offset = 0; local
7518 &stencil_offset, NULL, NULL);
7522 … (batch_ptr - batch->command.map) + isl_dev->ds.stencil_offset,
7523 sres->bo, stencil_offset, RELOC_32BIT);
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| /third_party/mesa3d/src/intel/blorp/ |
| D | blorp_genX_exec.h | 1768 blorp_emit_reloc(batch, dw + isl_dev->ds.stencil_offset / 4, in blorp_emit_depth_stencil_config()
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| /third_party/mesa3d/src/amd/vulkan/ |
| D | radv_image.c | 781 va += plane->surface.u.gfx9.zs.stencil_offset; in si_set_mutable_tex_desc_fields()
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| D | radv_device.c | 6597 s_offs += surf->u.gfx9.zs.stencil_offset; in radv_initialise_ds_surface()
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| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_descriptors.c | 305 va += tex->surface.u.gfx9.zs.stencil_offset; in si_set_mutable_tex_desc_fields()
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| D | si_state.c | 2721 … surf->db_stencil_base = (tex->buffer.gpu_address + tex->surface.u.gfx9.zs.stencil_offset) >> 8; in si_init_depth_surface()
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| /third_party/mesa3d/src/intel/vulkan/ |
| D | genX_cmd_buffer.c | 6379 dw + device->isl_dev.ds.stencil_offset / 4, in cmd_buffer_emit_depth_stencil()
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