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Searched refs:tmz (Results 1 – 7 of 7) sorted by relevance

/third_party/mesa3d/src/amd/vulkan/
Dradv_sdma_copy_image.c83 bool tmz = false; in radv_sdma_v4_v5_copy_image_to_buffer() local
101 CIK_SDMA_COPY_SUB_OPCODE_LINEAR, (tmz ? 4 : 0))); in radv_sdma_v4_v5_copy_image_to_buffer()
139 (tmz ? 4 : 0)) | in radv_sdma_v4_v5_copy_image_to_buffer()
175 V_028C78_MAX_BLOCK_SIZE_256B << 26 | tmz << 29 | in radv_sdma_v4_v5_copy_image_to_buffer()
/third_party/mesa3d/src/gallium/drivers/radeonsi/
Dsi_sdma_copy_image.c123 bool tmz = (ssrc->buffer.flags & RADEON_FLAG_ENCRYPTED); in si_sdma_v4_v5_copy_texture() local
124 assert (!tmz || (sdst->buffer.flags & RADEON_FLAG_ENCRYPTED)); in si_sdma_v4_v5_copy_texture()
141 (tmz ? 4 : 0))); in si_sdma_v4_v5_copy_texture()
179 (tmz ? 4 : 0)) | in si_sdma_v4_v5_copy_texture()
214 tmz << 29 | in si_sdma_v4_v5_copy_texture()
Dsi_state_shaders.cpp3722 static void si_cs_preamble_add_vgt_flush(struct si_context *sctx, bool tmz) in si_cs_preamble_add_vgt_flush() argument
3724 struct si_pm4_state *pm4 = tmz ? sctx->cs_preamble_state_tmz : sctx->cs_preamble_state; in si_cs_preamble_add_vgt_flush()
3725 bool *has_vgt_flush = tmz ? &sctx->cs_preamble_has_vgt_flush_tmz : in si_cs_preamble_add_vgt_flush()
3871 for (unsigned tmz = 0; tmz <= 1; tmz++) { in si_update_gs_ring_buffers() local
3872 struct si_pm4_state *pm4 = tmz ? sctx->cs_preamble_state_tmz : sctx->cs_preamble_state; in si_update_gs_ring_buffers()
3873 uint16_t *gs_ring_state_dw_offset = tmz ? &sctx->gs_ring_state_dw_offset_tmz : in si_update_gs_ring_buffers()
3877 si_cs_preamble_add_vgt_flush(sctx, tmz); in si_update_gs_ring_buffers()
4147 for (unsigned tmz = 0; tmz <= 1; tmz++) { in si_init_tess_factor_ring() local
4148 struct si_pm4_state *pm4 = tmz ? sctx->cs_preamble_state_tmz : sctx->cs_preamble_state; in si_init_tess_factor_ring()
4149 struct pipe_resource *tf_ring = tmz ? sctx->tess_rings_tmz : sctx->tess_rings; in si_init_tess_factor_ring()
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/third_party/mesa3d/docs/relnotes/
D20.3.0.rst3937 - radeonsi/tmz: use secure job if framebuffer has dcc
3938 - radeonsi/tmz: use secure job if using an encrypted z/s buffer
3939 - radeonsi/tmz: add safety assert when tmz is enabled
3940 - radeonsi/tmz: allocate depth/stencil buffers as encrypted
3944 - radeonsi/tmz: allow secure job if the app made a tmz allocation
3946 - radeonsi/tmz: fail si_texture_transfer_map if tex is encrypted
3947 - radeonsi/tmz: add tmz variant of sctx::wait_mem_scratch
3948 - radeonsi/tmz: add tmz variant for sctx::tess_rings
3949 - radeonsi: disable primitive discard if tmz is in use
3950 - radeonsi/tmz: add a tmz variant for sctx::eop_bug_scratch
[all …]
D20.2.0.rst3706 - radeonsi: add AMD_DEBUG=tmz option
3708 - radeonsi: allocate framebuffer texture as secure when using tmz
3711 - radeonsi/sdma: implement tmz support
D21.2.0.rst1240 - radeon/vcn: allocate non-tmz context buffer for VCN2+
4334 - radeonsi: use si_install_draw_wrapper for tmz handling
/third_party/astc-encoder/Test/Images/HDRIHaven/HDR-RGB/
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