Searched refs:u_bit_consecutive64 (Results 1 – 11 of 11) sorted by relevance
/third_party/mesa3d/src/util/ |
D | bitscan.h | 289 u_bit_consecutive64(unsigned start, unsigned count) in u_bit_consecutive64() function
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/third_party/mesa3d/src/compiler/nir/ |
D | nir_linking_helpers.c | 1643 uint64_t mask = u_bit_consecutive64(0, slots); in get_linked_variable_io_mask() 1686 … variable->data.driver_location = util_bitcount64(patch_io_mask & u_bit_consecutive64(0, loc)); in nir_assign_linked_io_var_locations() 1688 variable->data.driver_location = util_bitcount64(io_mask & u_bit_consecutive64(0, loc)); in nir_assign_linked_io_var_locations() 1695 … variable->data.driver_location = util_bitcount64(patch_io_mask & u_bit_consecutive64(0, loc)); in nir_assign_linked_io_var_locations() 1697 variable->data.driver_location = util_bitcount64(io_mask & u_bit_consecutive64(0, loc)); in nir_assign_linked_io_var_locations()
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/third_party/mesa3d/src/amd/vulkan/ |
D | radv_shader_info.c | 99 info->inline_push_constant_mask |= u_bit_consecutive64(start, size); in gather_push_constant_info()
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D | radv_cmd_buffer.c | 3562 if (mask == u_bit_consecutive64(base, util_last_bit64(mask) - base)) { in radv_emit_all_inline_push_consts()
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/third_party/mesa3d/src/gallium/drivers/radeonsi/ |
D | si_descriptors.c | 1752 u_bit_consecutive64(SI_NUM_SHADER_BUFFERS, SI_NUM_CONST_BUFFERS), in si_rebind_buffer() 1763 u_bit_consecutive64(0, SI_NUM_SHADER_BUFFERS), buf, in si_rebind_buffer() 3011 new_active_mask == u_bit_consecutive64(desc->first_active_slot, desc->num_active_slots)) in si_set_active_descriptors()
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D | si_state_shaders.cpp | 3132 *const_and_shader_buffers = u_bit_consecutive64(start, num_shaderbufs + num_constbufs); in si_get_active_slot_masks() 3147 *samplers_and_images = u_bit_consecutive64(start, num_images / 2 + num_samplers); in si_get_active_slot_masks()
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/third_party/mesa3d/src/mesa/vbo/ |
D | vbo_exec_api.c | 1117 exec->vtx.enabled = u_bit_consecutive64(0, VBO_ATTRIB_MAX); /* reset all */ in vbo_exec_vtx_init()
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/third_party/mesa3d/src/amd/common/ |
D | ac_nir_lower_ngg.c | 2364 unsigned driver_location = util_bitcount64(out->mask & u_bit_consecutive64(0, location)); in ms_store_arrayed_output_intrin() 2424 unsigned driver_location = util_bitcount64(out->mask & u_bit_consecutive64(0, location)); in ms_load_arrayed_output()
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/third_party/mesa3d/src/amd/compiler/ |
D | aco_register_allocation.cpp | 2966 sgpr_operands[reg / 64u] |= u_bit_consecutive64(reg % 64u, size); in register_allocation() 2970 if (sgpr_operands[reg / 64u] & u_bit_consecutive64(reg % 64u, size)) in register_allocation()
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/third_party/mesa3d/src/gallium/drivers/iris/ |
D | iris_state.c | 3603 ~u_bit_consecutive64(start_slot, count + unbind_num_trailing_slots); in iris_set_vertex_buffers()
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/third_party/mesa3d/src/gallium/drivers/crocus/ |
D | crocus_state.c | 3674 ~u_bit_consecutive64(start_slot, count + unbind_num_trailing_slots); in crocus_set_vertex_buffers()
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