v1i16 (reference) in projects: third_party

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Searched refs:v1i16 (Results 1 – 10 of 10) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/
D	MachineValueType.h	`82 v1i16 = 34, // 1 x i16 enumerator 329 return (SimpleTy == MVT::v2i8 \|\| SimpleTy == MVT::v1i16 \|\| in is16BitVector() 460 case v1i16: in getVectorElementType() 654 case v1i16: in getVectorNumElements() 714 case v1i16: return TypeSize::Fixed(16); in getSizeInBits() 947 if (NumElements == 1) return MVT::v1i16; in getVectorVT()`
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
D	AArch64SchedFalkorDetails.td	681 def : InstRW<[FalkorWr_1VXVY_3cyc], (instregex "^(S\|U)QADD(v1i8\|v1i16\|v2i16\|v1i32\|v1i64\|v2i32\|v4i… 683 def : InstRW<[FalkorWr_1VXVY_3cyc], (instregex "^(S\|U)(QSHL\|RSHL\|QRSHL)(v1i8\|v1i16\|v1i32\|v1i64\|v2… 685 def : InstRW<[FalkorWr_1VXVY_3cyc], (instregex "^(S\|U)QSUB(v1i8\|v1i16\|v2i16\|v1i32\|v1i64\|v2i32\|v4i… 690 def : InstRW<[FalkorWr_1VXVY_3cyc], (instregex "^(SU\|US)QADD(v1i8\|v1i16\|v2i16\|v1i32\|v1i64\|v2i32\|v… 694 def : InstRW<[FalkorWr_1VXVY_3cyc], (instregex "^SQABS(v1i8\|v1i16\|v1i32\|v1i64\|v2i32\|v4i16\|v8i8)$"… 695 def : InstRW<[FalkorWr_1VXVY_3cyc], (instregex "^SQNEG(v1i8\|v1i16\|v1i32\|v1i64)$")>; 703 … (instregex "^SQR?DMULH(v8i8\|v4i16\|v1i32\|v2i32\|v1i16)(_indexed)?$")>; 707 … (instregex "^SQRDML(A\|S)H(i16\|i32\|v8i8\|v4i16\|v1i32\|v2i32\|v1i16)(_indexed)?$")>;
D	AArch64SchedA57.td	`347 // D form - v1i8, v1i16, v1i32, v1i64 374 def : InstRW<[A57Write_5cyc_1W], (instregex "^(P?MUL\|SQR?DMULH)(v8i8\|v4i16\|v2i32\|v1i8\|v1i16\|v1i32\|v… 410 def : InstRW<[A57Write_4cyc_1X], (instregex "^[SU][QR]{1,2}SHL(v1i8\|v1i16\|v1i32\|v1i64\|v8i8\|v4i16\|v2… 500 // D form - v1i8, v1i16, v1i32, v1i64`
D	AArch64SchedKryoDetails.td	`213 (instregex "(S\|U\|SU\|US)QADD(v1i8\|v1i16\|v2i16\|v1i32\|v1i64)")>; 231 (instregex "(S\|U)(QSHL\|RSHL\|QRSHL)(v1i8\|v1i16\|v1i32\|v1i64\|v8i8\|v4i16\|v2i32)$")>; 261 (instregex "(S\|U)QSUB(v8i8\|v4i16\|v2i32\|v1i64\|v1i32\|v1i16\|v1i8)")>; 273 (instregex "(S\|U)QXTU?N(v1i8\|v1i16\|v1i32)")>; 1818 (instregex "SQR?DMULH(v8i8\|v4i16\|v1i32\|v2i32\|v1i16)(_indexed)?")>; 1824 (instregex "SQ(ABS\|NEG)(v1i8\|v1i16\|v1i32\|v1i64)")>;`
D	AArch64SchedThunderX2T99.td	`1306 "(v8i8\|v4i16\|v2i32\|v1i8\|v1i16\|v1i32\|v1i64)" # 1335 "(v1i8\|v1i16\|v1i32\|v1i64\|v8i8\|v4i16\|v2i32\|b\|d\|h\|s)")>;`
D	AArch64InstrFormats.td	6555 def v1i16 : BaseSIMDThreeScalar<U, 0b011, opc, FPR16, asm, []>; 6568 def v1i16 : BaseSIMDThreeScalar<U, 0b011, opc, FPR16, asm, []>; 6576 def v1i16: BaseSIMDThreeScalarTied<U, 0b01, R, opc, (outs FPR16:$dst), 6796 def v1i16 : BaseSIMDTwoScalar<U, {S,1}, 0b11, opc, FPR16, FPR16, asm, 6808 def v1i16 : BaseSIMDTwoScalar<U, 0b01, 0b00, opc, FPR16, FPR16, asm, []>; 6823 def v1i16 : BaseSIMDTwoScalarTied<U, 0b01, opc, FPR16, FPR16, asm, []>; 6838 def v1i16 : BaseSIMDTwoScalar<U, 0b01, 0b00, opc, FPR16, FPR32, asm, []>;
D	AArch64ISelLowering.cpp	`13048 if (VT == MVT::v1i8 \|\| VT == MVT::v1i16 \|\| VT == MVT::v1i32 \|\| in getPreferredVectorAction()`
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
D	ValueTypes.cpp	`179 case MVT::v1i16: return VectorType::get(Type::getInt16Ty(Context), 1); in getTypeForEVT()`
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
D	ValueTypes.td	`57 def v1i16 : ValueType<16 , 34>; // 1 x i16 vector value`
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/
D	Intrinsics.td	`248 def llvm_v1i16_ty : LLVMType<v1i16>; // 1 x i16`