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Searched refs:v2f64 (Results 1 – 25 of 96) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMCallingConv.td32 // Handle all vector types as either f64 or v2f64.
34 CCIfType<[v2i64, v4i32, v8i16, v8f16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
36 // f64 and v2f64 are passed in adjacent GPRs, possibly split onto the stack
37 CCIfType<[f64, v2f64], CCCustom<"CC_ARM_APCS_Custom_f64">>,
44 CCIfType<[v2f64], CCAssignToStack<16, 4>>
58 // Handle all vector types as either f64 or v2f64.
60 CCIfType<[v2i64, v4i32, v8i16, v8f16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
62 CCIfType<[f64, v2f64], CCCustom<"RetCC_ARM_APCS_Custom_f64">>,
73 // Handle all vector types as either f64 or v2f64.
75 CCIfType<[v2i64, v4i32, v8i16, v8f16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
[all …]
DARMCallingConv.cpp57 if (LocVT == MVT::v2f64 && in CC_ARM_APCS_Custom_f64()
111 if (LocVT == MVT::v2f64 && in CC_ARM_AAPCS_Custom_f64()
143 if (LocVT == MVT::v2f64 && !f64RetAssign(ValNo, ValVT, LocVT, LocInfo, State)) in RetCC_ARM_APCS_Custom_f64()
222 case MVT::v2f64: in CC_ARM_AAPCS_Custom_Aggregate()
DARMTargetTransformInfo.cpp161 { ISD::FP_ROUND, MVT::v2f64, 2 }, in getCastInstrCost()
275 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 }, in getCastInstrCost()
276 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 }, in getCastInstrCost()
278 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 }, in getCastInstrCost()
279 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 }, in getCastInstrCost()
280 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i16, 3 }, in getCastInstrCost()
281 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i16, 3 }, in getCastInstrCost()
282 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 }, in getCastInstrCost()
283 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 }, in getCastInstrCost()
285 { ISD::FP_TO_SINT, MVT::v2i32, MVT::v2f64, 2 }, in getCastInstrCost()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCInstrVSX.td62 SDTCisVT<0, v2f64>, SDTCisVT<1, v4f32>, SDTCisPtrTy<2>
71 SDTCisVT<0, v2f64>, SDTCisPtrTy<1>
74 SDTCisVT<0, v2f64>, SDTCisPtrTy<1>
174 [(set v2f64:$XT, (int_ppc_vsx_lxvd2x xoaddr:$src))]>;
231 [(set v2f64:$XT, (fadd v2f64:$XA, v2f64:$XB))]>;
241 [(set v2f64:$XT, (fmul v2f64:$XA, v2f64:$XB))]>;
258 [(set v2f64:$XT, (fsub v2f64:$XA, v2f64:$XB))]>;
334 [(set v2f64:$XT, (fma v2f64:$XA, v2f64:$XB, v2f64:$XTi))]>,
366 [(set v2f64:$XT, (fma v2f64:$XA, v2f64:$XB, (fneg v2f64:$XTi)))]>,
398 [(set v2f64:$XT, (fneg (fma v2f64:$XA, v2f64:$XB, v2f64:$XTi)))]>,
[all …]
DREADME_P9.txt323 int_ppc_vsx_xvcmpeqdp, v2i64, v2f64>;
430 (set v2f64:$XT, (int_ppc_vsx_xviexpdp v2f64:$XA, v2f64:$XB))
435 (set v2f64:$XT, (int_ppc_vsx_xvxexpdp v2f64:$XB))
437 (set v2f64:$XT, (int_ppc_vsx_xvxsigdp v2f64:$XB))
452 (set v2f64:$XT, (int_ppc_vsx_xvtstdcdp v2f64:$XB, i7:$DCMX))
548 [(set v2f64:$XT, (int_ppc_vsx_lxvd2x xoaddr:$src))]>;
558 [(store v2f64:$XT, xoaddr:$dst)]>;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64TargetTransformInfo.cpp328 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i64, 1 }, in getCastInstrCost()
331 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i64, 1 }, in getCastInstrCost()
358 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 }, in getCastInstrCost()
359 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i16, 4 }, in getCastInstrCost()
360 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 }, in getCastInstrCost()
361 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 }, in getCastInstrCost()
362 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i16, 4 }, in getCastInstrCost()
363 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 }, in getCastInstrCost()
369 { ISD::FP_TO_SINT, MVT::v2i64, MVT::v2f64, 1 }, in getCastInstrCost()
372 { ISD::FP_TO_UINT, MVT::v2i64, MVT::v2f64, 1 }, in getCastInstrCost()
[all …]
DAArch64CallingConvention.td32 CCIfType<[v2f64, v4f32], CCBitConvertToType<v2i64>>,
38 CCIfBigEndian<CCIfType<[v2i64, v2f64, v4i32, v4f32, v8i16, v8f16, v16i8],
89 // Handle i1, i8, i16, i32, i64, f32, f64 and v2f64 by passing in registers,
112 CCIfType<[f128, v2i64, v4i32, v8i16, v16i8, v4f32, v2f64, v8f16],
120 CCIfType<[f128, v2i64, v4i32, v8i16, v16i8, v4f32, v2f64, v8f16],
128 CCIfType<[v2f64, v4f32], CCBitConvertToType<v2i64>>,
137 CCIfBigEndian<CCIfType<[v2i64, v2f64, v4i32, v4f32, v8i16, v8f16, v16i8],
154 CCIfType<[f128, v2i64, v4i32, v8i16, v16i8, v4f32, v2f64, v8f16],
189 CCIfType<[v2f64, v4f32, f128], CCBitConvertToType<v2i64>>,
206 // Handle i1, i8, i16, i32, i64, f32, f64 and v2f64 by passing in registers,
[all …]
DAArch64ISelDAGToDAG.cpp1841 if ((VT != MVT::v2f64 || NarrowVT != MVT::v2f32) && in tryHighFPExt()
1856 auto Opcode = VT == MVT::v2f64 ? AArch64::FCVTLv4i32 : AArch64::FCVTLv8i16; in tryHighFPExt()
3203 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
3230 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
3257 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
3284 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
3311 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
3338 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
3365 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
3392 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
[all …]
DAArch64InstrInfo.td815 foreach Ty = [v4f32, v2f64] in {
2106 defm : ScalToVecROLoadPat<ro64, load, f64, v2f64, LDRDroW, LDRDroX, dsub>;
2148 defm : VecROLoadPat<ro128, v2f64, LDRQroW, LDRQroX>;
2295 def : Pat<(v2f64 (load (am_indexed128 GPR64sp:$Rn, uimm12s16:$offset))),
2476 def : Pat<(v2f64 (load (am_unscaled128 GPR64sp:$Rn, simm9:$offset))),
2810 defm : VecROStorePat<ro128, v2f64, FPR128, STRQroW, STRQroX>;
2842 defm : VecROStoreLane0Pat<ro64, store, v2f64, f64, dsub, STRDroW, STRDroX>;
2915 def : Pat<(store (v2f64 FPR128:$Rt),
2964 defm : VecStoreLane0Pat<am_indexed64, store, v2f64, f64, dsub, uimm12s8, STRDui>;
3051 def : Pat<(store (v2f64 FPR128:$Rt),
[all …]
DAArch64SchedA57.td421 // Q form - v4f32, v2f64
430 def : InstRW<[A57Write_5cyc_2V], (instregex "^(FABD|FADD|FSUB)(v4f32|v2f64|v2i64p)")>;
435 def : InstRW<[A57Write_9cyc_3V], (instregex "^FADDP(v4f32|v2f64|v2i64)")>;
440 …ite_5cyc_2V], (instregex "^(FACGE|FACGT|FCMEQ|FCMGE|FCMGT|FCMLE|FCMLT)(v4f32|v2f64|v4i32|v2i64)")>;
447 def : InstRW<[A57Write_5cyc_2V], (instregex "^[FVSU]CVT([AMNPZ][SU])?(_Int)?(v4f32|v2f64|v4i32|v2i6…
467 def : InstRW<[A57Write_5cyc_2V], (instregex "^(FMAX|FMIN)(NM)?(v4f32|v2f64)")>;
471 def : InstRW<[A57Write_9cyc_3V], (instregex "^(FMAX|FMIN)(NM)?P(v4f32|v2f64|v2i64)")>;
478 def : InstRW<[A57Write_5cyc_2V], (instregex "^FMULX?(v4f32|v2f64|v4i32|v2i64)")>;
486 def : InstRW<[A57WriteFPVMAQ, A57ReadFPVMA5], (instregex "^FML[AS](v4f32|v2f64|v4i32|v2i64)")>;
491 def : InstRW<[A57Write_5cyc_2V], (instregex "^FRINT[AIMNPXZ](v4f32|v2f64)")>;
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrSIMD.td28 defm "" : ARGUMENT<V128, v2f64>;
51 foreach vec_t = [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64] in {
82 ["v2i64", "v64x2"], ["v4f32", "v32x4"], ["v2f64", "v64x2"]] in {
149 foreach vec_t = [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64] in {
213 defm "" : ConstVec<v2f64,
252 foreach vec_t = [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64] in {
313 defm "" : Splat<v2f64, "f64x2", F64, splat2, 21>;
326 def : ScalarSplatPat<v2f64, f64, F64>;
379 defm "" : ExtractLane<v2f64, "f64x2", LaneIdx2, F64, 22>;
407 def : Pat<(vector_extract (v2f64 V128:$vec), undef),
[all …]
DWebAssemblyInstrCall.td68 defm "" : CALL<v2f64, V128, "v128.", [HasSIMD128]>;
140 def : Pat<(v2f64 (WebAssemblycall1 (WebAssemblywrapper tglobaladdr:$callee))),
169 def : Pat<(v2f64 (WebAssemblycall1 (WebAssemblywrapper texternalsym:$callee))),
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrFMA.td141 loadv2f64, loadv4f64, X86any_Fmadd, v2f64,
144 loadv2f64, loadv4f64, X86Fmsub, v2f64,
148 v2f64, v4f64, SchedWriteFMA>, VEX_W;
151 v2f64, v4f64, SchedWriteFMA>, VEX_W;
163 loadv4f64, X86Fnmadd, v2f64, v4f64, SchedWriteFMA>, VEX_W;
165 loadv4f64, X86Fnmsub, v2f64, v4f64, SchedWriteFMA>, VEX_W;
380 defm : scalar_fma_patterns<X86any_Fmadd, "VFMADD", "SD", X86Movsd, v2f64, f64, FR64, loadf64>;
381 defm : scalar_fma_patterns<X86Fmsub, "VFMSUB", "SD", X86Movsd, v2f64, f64, FR64, loadf64>;
382 defm : scalar_fma_patterns<X86Fnmadd, "VFNMADD", "SD", X86Movsd, v2f64, f64, FR64, loadf64>;
383 defm : scalar_fma_patterns<X86Fnmsub, "VFNMSUB", "SD", X86Movsd, v2f64, f64, FR64, loadf64>;
[all …]
DX86TargetTransformInfo.cpp189 { ISD::FDIV, MVT::v2f64, 65 }, // divpd in getArithmeticInstrCost()
202 { ISD::FMUL, MVT::v2f64, 4 }, // mulpd in getArithmeticInstrCost()
207 { ISD::FDIV, MVT::v2f64, 69 }, // divpd in getArithmeticInstrCost()
208 { ISD::FADD, MVT::v2f64, 2 }, // addpd in getArithmeticInstrCost()
209 { ISD::FSUB, MVT::v2f64, 2 }, // subpd in getArithmeticInstrCost()
706 { ISD::FDIV, MVT::v2f64, 14 }, // Haswell from http://www.agner.org/ in getArithmeticInstrCost()
743 { ISD::FDIV, MVT::v2f64, 22 }, // SNB from http://www.agner.org/ in getArithmeticInstrCost()
754 { ISD::FADD, MVT::v2f64, 1 }, // Nehalem from http://www.agner.org/ in getArithmeticInstrCost()
759 { ISD::FSUB, MVT::v2f64, 1 }, // Nehalem from http://www.agner.org/ in getArithmeticInstrCost()
764 { ISD::FMUL, MVT::v2f64, 1 }, // Nehalem from http://www.agner.org/ in getArithmeticInstrCost()
[all …]
DX86InstrVecCompiler.td22 def : Pat<(f64 (extractelt (v2f64 VR128:$src), (iPTR 0))),
23 (COPY_TO_REGCLASS (v2f64 VR128:$src), FR64)>;
30 def : Pat<(f64 (extractelt (v2f64 VR128X:$src), (iPTR 0))),
31 (COPY_TO_REGCLASS (v2f64 VR128X:$src), FR64X)>;
39 def : Pat<(v2f64 (scalar_to_vector FR64:$src)),
48 def : Pat<(v2f64 (scalar_to_vector FR64X:$src)),
74 defm : subvector_subreg_lowering<VR128, v2f64, VR256, v4f64, sub_xmm>;
85 defm : subvector_subreg_lowering<VR128, v2f64, VR512, v8f64, sub_xmm>;
115 defm : subvec_zero_lowering<"APD", VR128, v4f64, v2f64, v8i32, sub_xmm>;
124 defm : subvec_zero_lowering<"APDZ128", VR128X, v4f64, v2f64, v8i32, sub_xmm>;
[all …]
DX86InstrSSE.td143 def : Pat<(v2f64 immAllZerosV), (V_SET0)>;
270 defm MOVSD : sse12_move<FR64, X86Movsd, v2f64, f64mem, "movsd",
276 defm MOVSD : sse12_move_rm<FR64, v2f64, f64mem, loadf64, X86vzload64, "movsd",
284 def : Pat<(v2f64 (scalar_to_vector (loadf64 addr:$src))),
324 def : Pat<(v2f64 (scalar_to_vector (loadf64 addr:$src))),
403 [(alignedstore (v2f64 VR128:$src), addr:$dst)]>,
411 [(store (v2f64 VR128:$src), addr:$dst)]>,
501 [(alignedstore (v2f64 VR128:$src), addr:$dst)]>;
507 [(store (v2f64 VR128:$src), addr:$dst)]>;
632 [(set VR128:$dst, (v2f64 (pdnode VR128:$src1,
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/
DARMGenCallingConv.inc79 LocVT = MVT::v2f64;
102 LocVT == MVT::v2f64) {
200 if (LocVT == MVT::v2f64) {
211 if (LocVT == MVT::v2f64) {
249 LocVT = MVT::v2f64;
276 if (LocVT == MVT::v2f64) {
368 LocVT = MVT::v2f64;
373 LocVT == MVT::v2f64) {
405 if (LocVT == MVT::v2f64) {
435 LocVT = MVT::v2f64;
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZCallingConv.td56 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
76 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
120 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
127 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
132 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
DSystemZInstrVector.td135 def : Pat<(v2f64 (z_replicate_loadf64 bdxaddr12only:$addr)),
170 def : Pat<(z_vlef64 (v2f64 VR128:$val), bdxaddr12only:$addr, imm32zx1:$index),
202 defm : ReplicatePeephole<VLREPG, v2f64, load, f64>;
226 def : Pat<(z_vstef64 (v2f64 VR128:$val), bdxaddr12only:$addr,
270 def : Pat<(v2f64 (z_loadeswap bdxaddr12only:$addr)),
311 def : Pat<(z_storeeswap (v2f64 VR128:$val), bdxaddr12only:$addr),
338 def : BinaryRRWithType<VMRHG, VR128, z_merge_high, v2f64>;
347 def : BinaryRRWithType<VMRLG, VR128, z_merge_low, v2f64>;
367 def : Pat<(v2f64 (z_splat VR128:$vec, imm32zx16_timm:$index)),
459 defm : GenericVectorOps<v2f64, v2i64>;
[all …]
DSystemZISelLowering.cpp109 addRegisterClass(MVT::v2f64, &SystemZ::VR128BitRegClass); in SystemZTargetLowering()
400 setOperationAction(ISD::FP_TO_SINT, MVT::v2f64, Legal); in SystemZTargetLowering()
402 setOperationAction(ISD::FP_TO_UINT, MVT::v2f64, Legal); in SystemZTargetLowering()
404 setOperationAction(ISD::SINT_TO_FP, MVT::v2f64, Legal); in SystemZTargetLowering()
406 setOperationAction(ISD::UINT_TO_FP, MVT::v2f64, Legal); in SystemZTargetLowering()
409 setOperationAction(ISD::STRICT_FP_TO_SINT, MVT::v2f64, Legal); in SystemZTargetLowering()
411 setOperationAction(ISD::STRICT_FP_TO_UINT, MVT::v2f64, Legal); in SystemZTargetLowering()
413 setOperationAction(ISD::STRICT_SINT_TO_FP, MVT::v2f64, Legal); in SystemZTargetLowering()
415 setOperationAction(ISD::STRICT_UINT_TO_FP, MVT::v2f64, Legal); in SystemZTargetLowering()
487 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v2f64, Legal); in SystemZTargetLowering()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/
DPPCGenDAGISel.inc226 /* 387*/ OPC_CheckChild0Type, MVT::v2f64,
241 …// Src: (st (extractelt:{ *:[f64] } v2f64:{ *:[v2f64] }:$A, 1:{ *:[iPTR] }), iaddrX4:{ *:[iPTR] }:…
242 …// Dst: (DFSTOREf64 (EXTRACT_SUBREG:{ *:[f64] } ?:{ *:[v2f64] }:$A, sub_64:{ *:[i32] }), iaddrX4:{…
251 …// Src: (st (extractelt:{ *:[f64] } v2f64:{ *:[v2f64] }:$A, 1:{ *:[iPTR] }), xaddrX4:{ *:[iPTR] }:…
252 …// Dst: (XFSTOREf64 (EXTRACT_SUBREG:{ *:[f64] } ?:{ *:[v2f64] }:$A, sub_64:{ *:[i32] }), xaddrX4:{…
263 …// Src: (st (extractelt:{ *:[f64] } v2f64:{ *:[v2f64] }:$A, 1:{ *:[iPTR] }), xoaddr:{ *:[iPTR] }:$…
264 …// Dst: (XFSTOREf64 (EXTRACT_SUBREG:{ *:[f64] } ?:{ *:[v2f64] }:$A, sub_64:{ *:[i32] }), xoaddr:{ …
278 …// Src: (st (extractelt:{ *:[f64] } v2f64:{ *:[v2f64] }:$A, 1:{ *:[iPTR] }), iaddrX4:{ *:[iPTR] }:…
279 …Ef64 (EXTRACT_SUBREG:{ *:[f64] } (XXPERMDI:{ *:[v4i32] } ?:{ *:[v2f64] }:$A, ?:{ *:[v2f64] }:$A, 2…
291 …// Src: (st (extractelt:{ *:[f64] } v2f64:{ *:[v2f64] }:$A, 1:{ *:[iPTR] }), xaddrX4:{ *:[iPTR] }:…
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenCallingConv.inc55 if (LocVT == MVT::v2f64 ||
74 LocVT == MVT::v2f64 ||
330 LocVT == MVT::v2f64 ||
377 LocVT == MVT::v2f64 ||
402 if (LocVT == MVT::v2f64 ||
573 LocVT == MVT::v2f64 ||
637 LocVT == MVT::v2f64 ||
657 if (LocVT == MVT::v2f64 ||
721 LocVT == MVT::v2f64 ||
746 if (LocVT == MVT::v2f64 ||
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsMSAInstrInfo.td115 def vfseteq_v2f64 : vfsetcc_type<v2i64, v2f64, SETEQ>;
117 def vfsetge_v2f64 : vfsetcc_type<v2i64, v2f64, SETGE>;
119 def vfsetgt_v2f64 : vfsetcc_type<v2i64, v2f64, SETGT>;
121 def vfsetle_v2f64 : vfsetcc_type<v2i64, v2f64, SETLE>;
123 def vfsetlt_v2f64 : vfsetcc_type<v2i64, v2f64, SETLT>;
125 def vfsetne_v2f64 : vfsetcc_type<v2i64, v2f64, SETNE>;
127 def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>;
129 def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>;
131 def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>;
133 def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>;
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/
DMipsGenDAGISel.inc530 /* 862*/ OPC_CheckChild1Type, MVT::v2f64,
539 …// Src: (st MSA128D:{ *:[v2f64] }:$ws, addrimm10lsl3:{ *:[iPTR] }:$addr)<<P:Predicate_unindexedsto…
540 // Dst: (ST_D MSA128D:{ *:[v2f64] }:$ws, addrimm10lsl3:{ *:[iPTR] }:$addr)
1365 /* 2447*/ /*SwitchType*/ 14, MVT::v2f64,// ->2463
1370 MVT::v2f64, 2/*#Ops*/, 2, 3,
1371 …// Src: (ld:{ *:[v2f64] } addrimm10lsl3:{ *:[iPTR] }:$addr)<<P:Predicate_unindexedload>><<P:Predic…
1372 // Dst: (LD_D:{ *:[v2f64] } addrimm10lsl3:{ *:[iPTR] }:$addr)
9672 …o_chain:{ *:[v2i64] } 3876:{ *:[iPTR] }, MSA128DOpnd:{ *:[v2f64] }:$ws, MSA128DOpnd:{ *:[v2f64] }:…
9673 … // Dst: (FCAF_D:{ *:[v2i64] } MSA128DOpnd:{ *:[v2f64] }:$ws, MSA128DOpnd:{ *:[v2f64] }:$wt)
9688 …// Src: (intrinsic_wo_chain:{ *:[v2i64] } 3880:{ *:[iPTR] }, MSA128DOpnd:{ *:[v2f64] }:$ws) - Comp…
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/
DMachineValueType.h140 v2f64 = 85, // 2 x f64 enumerator
354 SimpleTy == MVT::v2f64); in is128BitVector()
537 case v2f64: in getVectorElementType()
643 case v2f64: in getVectorNumElements()
766 case v2f64: return TypeSize::Fixed(128); in getSizeInBits()
1010 if (NumElements == 2) return MVT::v2f64; in getVectorVT()

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