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Searched refs:v64i32 (Results 1 – 9 of 9) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonCallingConv.td102 CCIfType<[v64i32,v128i16,v256i8],
108 CCIfType<[v64i32,v128i16,v256i8],
128 CCIfType<[v64i32,v128i16,v256i8],
DHexagonIntrinsics.td271 def : Pat <(v32i32 (int_hexagon_V6_lo_128B (v64i32 HvxWR:$src1))),
272 (v32i32 (EXTRACT_SUBREG (v64i32 HvxWR:$src1), vsub_lo))>,
275 def : Pat <(v32i32 (int_hexagon_V6_hi_128B (v64i32 HvxWR:$src1))),
276 (v32i32 (EXTRACT_SUBREG (v64i32 HvxWR:$src1), vsub_hi))>,
350 def: Pat<(v64i16 (trunc v64i32:$Vdd)),
DHexagonIntrinsicsV60.td21 def : Pat < (v32i32 (int_hexagon_V6_lo_128B (v64i32 HvxWR:$src1))),
22 (v32i32 (EXTRACT_SUBREG (v64i32 HvxWR:$src1), vsub_lo)) >;
24 def : Pat < (v32i32 (int_hexagon_V6_hi_128B (v64i32 HvxWR:$src1))),
25 (v32i32 (EXTRACT_SUBREG (v64i32 HvxWR:$src1), vsub_hi)) >;
635 def: Pat<(v64i16 (trunc v64i32:$Vdd)),
DHexagonRegisterInfo.td299 [v32i32, v64i32, v32i32]>;
DHexagonISelLoweringHVX.cpp19 static const MVT LegalW128[] = { MVT::v256i8, MVT::v128i16, MVT::v64i32 };
49 addRegisterClass(MVT::v64i32, &Hexagon::HvxWRRegClass); in initializeHVXLowering()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/
DMachineValueType.h100 v64i32 = 51, // 64 x i32 enumerator
383 SimpleTy == MVT::v64i32 || SimpleTy == MVT::v32i64); in is2048BitVector()
483 case v64i32: in getVectorElementType()
571 case v64i32: in getVectorNumElements()
813 case v64i32: in getSizeInBits()
966 if (NumElements == 64) return MVT::v64i32; in getVectorVT()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DValueTypes.cpp196 case MVT::v64i32: return VectorType::get(Type::getInt32Ty(Context), 64); in getTypeForEVT()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DValueTypes.td75 def v64i32 : ValueType<2048,51>; // 64 x i32 vector value
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/
DIntrinsics.td263 def llvm_v64i32_ty : LLVMType<v64i32>; // 64 x i32