/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/ |
D | MachineValueType.h | 142 v8f64 = 87, // 8 x f64 enumerator 145 LAST_FP_FIXEDLEN_VECTOR_VALUETYPE = v8f64, 148 LAST_FIXEDLEN_VECTOR_VALUETYPE = v8f64, 368 SimpleTy == MVT::v8f64 || SimpleTy == MVT::v512i1 || in is512BitVector() 539 case v8f64: in getVectorElementType() 605 case v8f64: in getVectorNumElements() 797 case v8f64: return TypeSize::Fixed(512); in getSizeInBits() 1012 if (NumElements == 8) return MVT::v8f64; in getVectorVT()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86TargetTransformInfo.cpp | 543 { ISD::FADD, MVT::v8f64, 1 }, // Skylake from http://www.agner.org/ in getArithmeticInstrCost() 544 { ISD::FSUB, MVT::v8f64, 1 }, // Skylake from http://www.agner.org/ in getArithmeticInstrCost() 545 { ISD::FMUL, MVT::v8f64, 1 }, // Skylake from http://www.agner.org/ in getArithmeticInstrCost() 1033 {TTI::SK_Broadcast, MVT::v8f64, 1}, // vbroadcastpd in getShuffleCost() 1038 {TTI::SK_Reverse, MVT::v8f64, 1}, // vpermpd in getShuffleCost() 1043 {TTI::SK_PermuteSingleSrc, MVT::v8f64, 1}, // vpermpd in getShuffleCost() 1057 {TTI::SK_PermuteTwoSrc, MVT::v8f64, 1}, // vpermt2pd in getShuffleCost() 1308 { ISD::SINT_TO_FP, MVT::v8f64, MVT::v8i64, 1 }, in getCastInstrCost() 1315 { ISD::UINT_TO_FP, MVT::v8f64, MVT::v8i64, 1 }, in getCastInstrCost() 1322 { ISD::FP_TO_SINT, MVT::v8i64, MVT::v8f64, 1 }, in getCastInstrCost() [all …]
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D | X86InstrVecCompiler.td | 85 defm : subvector_subreg_lowering<VR128, v2f64, VR512, v8f64, sub_xmm>; 96 defm : subvector_subreg_lowering<VR256, v4f64, VR512, v8f64, sub_ymm>; 131 defm : subvec_zero_lowering<"APDZ128", VR128X, v8f64, v2f64, v16i32, sub_xmm>; 138 defm : subvec_zero_lowering<"APDZ256", VR256X, v8f64, v4f64, v16i32, sub_ymm>; 147 defm : subvec_zero_lowering<"APD", VR128, v8f64, v2f64, v16i32, sub_xmm>; 154 defm : subvec_zero_lowering<"APDY", VR256, v8f64, v4f64, v16i32, sub_ymm>;
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D | X86CallingConv.td | 120 CCIfType<[v64i8, v32i16, v16i32, v8i64, v16f32, v8f64], 150 CCIfType<[v64i8, v32i16, v16i32, v8i64, v16f32, v8f64], 195 CCIfType<[v64i8, v32i16, v16i32, v8i64, v16f32, v8f64], 248 CCIfType<[v64i8, v32i16, v16i32, v8i64, v16f32, v8f64], 303 CCIfType<[v16f32, v8f64, v16i32, v8i64], 557 CCIfNotVarArg<CCIfType<[v64i8, v32i16, v16i32, v8i64, v16f32, v8f64], 577 CCIfType<[v64i8, v32i16, v16i32, v8i64, v16f32, v8f64], 624 CCIfType<[v64i8, v32i16, v16i32, v16f32, v8f64, v8i64], CCPassIndirect<i64>>, 689 CCIfType<[v64i8, v32i16, v16i32, v8i64, v16f32, v8f64], 747 CCIfType<[v64i8, v32i16, v16i32, v8i64, v16f32, v8f64], [all …]
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D | X86InstrFragmentsSIMD.td | 809 def loadv8f64 : PatFrag<(ops node:$ptr), (v8f64 (load node:$ptr))>; 867 (v8f64 (alignedload node:$ptr))>; 1002 def bc_v8f64 : PatFrag<(ops node:$in), (v8f64 (bitconvert node:$in))>;
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D | X86RegisterInfo.td | 577 def VR512 : RegisterClass<"X86", [v16f32, v8f64, v64i8, v32i16, v16i32, v8i64], 581 def VR512_0_15 : RegisterClass<"X86", [v16f32, v8f64, v64i8, v32i16, v16i32, v8i64],
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D | X86ISelLowering.cpp | 756 MVT::v2f64, MVT::v4f64, MVT::v8f64 }) { in X86TargetLowering() 1449 addRegisterClass(MVT::v8f64, &X86::VR512RegClass); in X86TargetLowering() 1459 for (MVT VT : { MVT::v16f32, MVT::v8f64 }) { in X86TargetLowering() 1483 setOperationAction(ISD::STRICT_FADD, MVT::v8f64, Legal); in X86TargetLowering() 1485 setOperationAction(ISD::STRICT_FSUB, MVT::v8f64, Legal); in X86TargetLowering() 1487 setOperationAction(ISD::STRICT_FMUL, MVT::v8f64, Legal); in X86TargetLowering() 1489 setOperationAction(ISD::STRICT_FDIV, MVT::v8f64, Legal); in X86TargetLowering() 1491 setOperationAction(ISD::STRICT_FSQRT, MVT::v8f64, Legal); in X86TargetLowering() 1492 setOperationAction(ISD::STRICT_FP_EXTEND, MVT::v8f64, Legal); in X86TargetLowering() 1526 for (auto VT : { MVT::v16f32, MVT::v8f64 }) { in X86TargetLowering() [all …]
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D | X86InstrAVX512.td | 421 def : Pat<(v8f64 immAllZerosV), (AVX512_512_SET0)>; 924 def : Pat<(v2f64 (extract_subvector (v8f64 VR512:$src), (iPTR 2))), 926 (v4f64 (EXTRACT_SUBREG (v8f64 VR512:$src), sub_ymm)), 953 def : Pat<(v2f64 (extract_subvector (v8f64 VR512:$src), (iPTR 2))), 955 (v4f64 (EXTRACT_SUBREG (v8f64 VR512:$src), sub_ymm)), 1490 def : Pat<(v8f64 (X86SubVBroadcast (v4f64 VR256X:$src))), 1491 (VINSERTF64x4Zrr (INSERT_SUBREG (v8f64 (IMPLICIT_DEF)), VR256X:$src, sub_ymm), 1509 def : Pat<(v8f64 (X86SubVBroadcast (loadv2f64 addr:$src))), 1520 (bc_v16f32 (v8f64 (X86SubVBroadcast (loadv2f64 addr:$src)))), 1524 (bc_v16f32 (v8f64 (X86SubVBroadcast (loadv2f64 addr:$src)))), [all …]
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D | X86FastISel.cpp | 447 case MVT::v8f64: in X86FastEmitLoad() 619 case MVT::v8f64: in X86FastEmitStore()
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D | X86InstrCompiler.td | 654 def : Pat<(v8f64 (X86cmov VR512:$t, VR512:$f, timm:$cond, EFLAGS)),
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/ |
D | X86GenCallingConv.inc | 254 LocVT == MVT::v8f64 || 935 LocVT == MVT::v8f64) { 1022 LocVT == MVT::v8f64) { 1151 LocVT == MVT::v8f64) { 1207 LocVT == MVT::v8f64) { 1271 LocVT == MVT::v8f64) { 1584 LocVT == MVT::v8f64) { 1642 LocVT == MVT::v8f64) { 1719 LocVT == MVT::v8f64) { 2007 LocVT == MVT::v8f64) { [all …]
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D | X86GenFastISel.inc | 936 if (RetVT.SimpleTy != MVT::v8f64) 1209 if (RetVT.SimpleTy != MVT::v8f64) 1227 case MVT::v8f64: return fastEmit_ISD_FSQRT_MVT_v8f64_r(RetVT, Op0, Op0IsKill); 1806 case MVT::v8f64: return fastEmit_ISD_SINT_TO_FP_MVT_v8i32_MVT_v8f64_r(Op0, Op0IsKill); 1868 case MVT::v8f64: return fastEmit_ISD_SINT_TO_FP_MVT_v8i64_MVT_v8f64_r(Op0, Op0IsKill); 1911 if (RetVT.SimpleTy != MVT::v8f64) 2184 if (RetVT.SimpleTy != MVT::v8f64) 2202 case MVT::v8f64: return fastEmit_ISD_STRICT_FSQRT_MVT_v8f64_r(RetVT, Op0, Op0IsKill); 2304 case MVT::v8f64: return fastEmit_ISD_STRICT_SINT_TO_FP_MVT_v8i32_MVT_v8f64_r(Op0, Op0IsKill); 2366 case MVT::v8f64: return fastEmit_ISD_STRICT_SINT_TO_FP_MVT_v8i64_MVT_v8f64_r(Op0, Op0IsKill); [all …]
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D | X86GenGlobalISel.inc | 13048 …dd:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VADDPDZrr:{ *:[v8f64]… 13369 …ub:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VSUBPDZrr:{ *:[v8f64]… 13690 …ul:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VMULPDZrr:{ *:[v8f64]… 14011 …iv:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VDIVPDZrr:{ *:[v8f64]… 14212 …// (fpextend:{ *:[v8f64] } VR256X:{ *:[v8f32] }:$src) => (VCVTPS2PDZrr:{ *:[v8f64] } VR256X:{ *:… 14899 …// (sint_to_fp:{ *:[v8f64] } VR256X:{ *:[v8i32] }:$src) => (VCVTDQ2PDZrr:{ *:[v8f64] } VR256X:{ … 14910 …// (sint_to_fp:{ *:[v8f64] } VR512:{ *:[v8i64] }:$src) => (VCVTQQ2PDZrr:{ *:[v8f64] } VR512:{ *:… 15121 …// (uint_to_fp:{ *:[v8f64] } VR256X:{ *:[v8i32] }:$src) => (VCVTUDQ2PDZrr:{ *:[v8f64] } VR256X:{… 15132 …// (uint_to_fp:{ *:[v8f64] } VR512:{ *:[v8i64] }:$src) => (VCVTUQQ2PDZrr:{ *:[v8f64] } VR512:{ *… 17116 …// (fsqrt:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src) => (VSQRTPDZr:{ *:[v8f64] } VR512:{ *:[v8f64] …
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D | X86GenRegisterInfo.inc | 4493 /* 47 */ MVT::v16f32, MVT::v8f64, MVT::v64i8, MVT::v32i16, MVT::v16i32, MVT::v8i64, MVT::Other,
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
D | ValueTypes.cpp | 232 case MVT::v8f64: return VectorType::get(Type::getDoubleTy(Context), 8); in getTypeForEVT()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
D | ValueTypes.td | 114 def v8f64 : ValueType<512, 87>; // 8 x f64 vector value
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | AMDGPUISelLowering.cpp | 163 setLoadExtAction(ISD::EXTLOAD, MVT::v8f64, MVT::v8f32, Expand); in AMDGPUTargetLowering() 168 setLoadExtAction(ISD::EXTLOAD, MVT::v8f64, MVT::v8f16, Expand); in AMDGPUTargetLowering() 233 setTruncStoreAction(MVT::v8f64, MVT::v8f32, Expand); in AMDGPUTargetLowering() 234 setTruncStoreAction(MVT::v8f64, MVT::v8f16, Expand); in AMDGPUTargetLowering()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
D | Intrinsics.td | 286 def llvm_v8f64_ty : LLVMType<v8f64>; // 8 x double
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