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Searched refs:vs_state_bits (Results 1 – 8 of 8) sorted by relevance

/third_party/mesa3d/src/gallium/drivers/radeonsi/
Dsi_shader_internal.h97 struct ac_arg vs_state_bits; member
Dsi_shader.c429 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->vs_state_bits); in si_init_shader_args()
461 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->vs_state_bits); in si_init_shader_args()
496 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->vs_state_bits); in si_init_shader_args()
575 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->vs_state_bits); in si_init_shader_args()
652 ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->vs_state_bits); in si_init_shader_args()
Dsi_shader.h299 #define GET_FIELD(ctx, field) si_unpack_param((ctx), (ctx)->vs_state_bits, field##__SHIFT, \
Dsi_shader_llvm_gs.c69 ret = si_insert_input_ptr(ctx, ret, ctx->vs_state_bits, 8 + SI_SGPR_VS_STATE_BITS); in si_set_es_return_value_for_gs()
Dsi_shader_llvm_tess.c555 ret = si_insert_input_ret(ctx, ret, ctx->vs_state_bits, 8 + SI_SGPR_VS_STATE_BITS); in si_set_ls_return_value_for_tcs()
Dgfx10_shader_ngg.c1434 ret = si_insert_input_ptr(ctx, ret, ctx->vs_state_bits, 8 + SI_SGPR_VS_STATE_BITS); in gfx10_ngg_culling_build_end()
/third_party/mesa3d/docs/relnotes/
D21.0.0.rst2058 - radeonsi: read vs_state_bits in vs_prolog correctly
D22.2.0.rst4032 - radeonsi: rework how vs_state_bits is set and unpacked