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/third_party/node/deps/openssl/config/archs/darwin64-arm64-cc/asm_avx2/crypto/sha/
Dsha1-armv8.S26 ldp w20,w21,[x0]
46 ror w27,w20,#27
58 bic w25,w22,w20
59 and w26,w21,w20
64 ror w20,w20,#2
70 and w26,w20,w24
83 bic w25,w20,w23
86 add w20,w20,w28 // future e+=K
90 add w20,w20,w7 // future e+=X[i]
99 add w20,w20,w27 // e+=rot(a,5)
[all …]
Dsha256-armv8.S89 ldp w20,w21,[x0] // load context
112 eor w19,w20,w21 // a^b, b^c in next round
114 ror w6,w20,#2
116 eor w17,w20,w20,ror#9
137 eor w28,w27,w20 // a^b, b^c in next round
145 eor w19,w19,w20 // Maj(a,b,c)
193 add w20,w20,w24 // d+=h
203 ror w16,w20,#6
205 eor w10,w20,w20,ror#14
206 and w17,w21,w20
[all …]
/third_party/node/deps/openssl/config/archs/darwin64-arm64-cc/asm/crypto/sha/
Dsha1-armv8.S26 ldp w20,w21,[x0]
46 ror w27,w20,#27
58 bic w25,w22,w20
59 and w26,w21,w20
64 ror w20,w20,#2
70 and w26,w20,w24
83 bic w25,w20,w23
86 add w20,w20,w28 // future e+=K
90 add w20,w20,w7 // future e+=X[i]
99 add w20,w20,w27 // e+=rot(a,5)
[all …]
Dsha256-armv8.S89 ldp w20,w21,[x0] // load context
112 eor w19,w20,w21 // a^b, b^c in next round
114 ror w6,w20,#2
116 eor w17,w20,w20,ror#9
137 eor w28,w27,w20 // a^b, b^c in next round
145 eor w19,w19,w20 // Maj(a,b,c)
193 add w20,w20,w24 // d+=h
203 ror w16,w20,#6
205 eor w10,w20,w20,ror#14
206 and w17,w21,w20
[all …]
/third_party/node/deps/openssl/config/archs/linux-aarch64/asm_avx2/crypto/sha/
Dsha1-armv8.S26 ldp w20,w21,[x0]
46 ror w27,w20,#27
58 bic w25,w22,w20
59 and w26,w21,w20
64 ror w20,w20,#2
70 and w26,w20,w24
83 bic w25,w20,w23
86 add w20,w20,w28 // future e+=K
90 add w20,w20,w7 // future e+=X[i]
99 add w20,w20,w27 // e+=rot(a,5)
[all …]
Dsha256-armv8.S89 ldp w20,w21,[x0] // load context
112 eor w19,w20,w21 // a^b, b^c in next round
114 ror w6,w20,#2
116 eor w17,w20,w20,ror#9
137 eor w28,w27,w20 // a^b, b^c in next round
145 eor w19,w19,w20 // Maj(a,b,c)
193 add w20,w20,w24 // d+=h
203 ror w16,w20,#6
205 eor w10,w20,w20,ror#14
206 and w17,w21,w20
[all …]
/third_party/node/deps/openssl/config/archs/linux-aarch64/asm/crypto/sha/
Dsha1-armv8.S26 ldp w20,w21,[x0]
46 ror w27,w20,#27
58 bic w25,w22,w20
59 and w26,w21,w20
64 ror w20,w20,#2
70 and w26,w20,w24
83 bic w25,w20,w23
86 add w20,w20,w28 // future e+=K
90 add w20,w20,w7 // future e+=X[i]
99 add w20,w20,w27 // e+=rot(a,5)
[all …]
Dsha256-armv8.S89 ldp w20,w21,[x0] // load context
112 eor w19,w20,w21 // a^b, b^c in next round
114 ror w6,w20,#2
116 eor w17,w20,w20,ror#9
137 eor w28,w27,w20 // a^b, b^c in next round
145 eor w19,w19,w20 // Maj(a,b,c)
193 add w20,w20,w24 // d+=h
203 ror w16,w20,#6
205 eor w10,w20,w20,ror#14
206 and w17,w21,w20
[all …]
/third_party/node/deps/openssl/config/archs/linux-aarch64/asm/crypto/chacha/
Dchacha-armv8.S75 mov w20,w30
88 eor w20,w20,w7
92 ror w20,w20,#16
96 add w15,w15,w20
112 eor w20,w20,w7
116 ror w20,w20,#24
120 add w15,w15,w20
137 eor w20,w20,w8
141 ror w20,w20,#16
145 add w14,w14,w20
[all …]
/third_party/node/deps/openssl/config/archs/linux-aarch64/asm_avx2/crypto/chacha/
Dchacha-armv8.S75 mov w20,w30
88 eor w20,w20,w7
92 ror w20,w20,#16
96 add w15,w15,w20
112 eor w20,w20,w7
116 ror w20,w20,#24
120 add w15,w15,w20
137 eor w20,w20,w8
141 ror w20,w20,#16
145 add w14,w14,w20
[all …]
/third_party/node/deps/openssl/config/archs/darwin64-arm64-cc/asm_avx2/crypto/chacha/
Dchacha-armv8.S75 mov w20,w30
88 eor w20,w20,w7
92 ror w20,w20,#16
96 add w15,w15,w20
112 eor w20,w20,w7
116 ror w20,w20,#24
120 add w15,w15,w20
137 eor w20,w20,w8
141 ror w20,w20,#16
145 add w14,w14,w20
[all …]
/third_party/node/deps/openssl/config/archs/darwin64-arm64-cc/asm/crypto/chacha/
Dchacha-armv8.S75 mov w20,w30
88 eor w20,w20,w7
92 ror w20,w20,#16
96 add w15,w15,w20
112 eor w20,w20,w7
116 ror w20,w20,#24
120 add w15,w15,w20
137 eor w20,w20,w8
141 ror w20,w20,#16
145 add w14,w14,w20
[all …]
/third_party/vixl/test/test-trace-reference/
Dlog-regs72 # w20: 0xad83ccb8
132 # w20: 0x07060504 <- 0x~~~~~~~~~~~~~~~~
261 # w20: 0x00000403
311 # w20: 0xfffffbfc
323 # w20: 0x00000304
369 # w20: 0x00000001
Dlog-disasm57 0x~~~~~~~~~~~~~~~~ 1ad652b4 crc32cb w20, w21, w22
91 0x~~~~~~~~~~~~~~~~ 4a150293 eor w19, w20, w21
112 0x~~~~~~~~~~~~~~~~ 28405013 ldnp w19, w20, [x0]
164 0x~~~~~~~~~~~~~~~~ 78c03014 ldursh w20, [x0, #3]
181 0x~~~~~~~~~~~~~~~~ 1ad52693 lsr w19, w20, w21
205 0x~~~~~~~~~~~~~~~~ 5a1503f4 ngc w20, w21
220 0x~~~~~~~~~~~~~~~~ 5ac006b4 rev16 w20, w21
238 0x~~~~~~~~~~~~~~~~ 089ffc14 stlrb w20, [x0]
288 0x~~~~~~~~~~~~~~~~ 48147c15 stxrh w20, w21, [x0]
300 0x~~~~~~~~~~~~~~~~ 6a15029f tst w20, w21
[all …]
Dlog-disasm-colour57 0x~~~~~~~~~~~~~~~~ 1ad652b4 crc32cb w20, w21, w22
91 0x~~~~~~~~~~~~~~~~ 4a150293 eor w19, w20, w21
112 0x~~~~~~~~~~~~~~~~ 28405013 ldnp w19, w20, [x0]
164 0x~~~~~~~~~~~~~~~~ 78c03014 ldursh w20, [x0, #3]
181 0x~~~~~~~~~~~~~~~~ 1ad52693 lsr w19, w20, w21
205 0x~~~~~~~~~~~~~~~~ 5a1503f4 ngc w20, w21
220 0x~~~~~~~~~~~~~~~~ 5ac006b4 rev16 w20, w21
238 0x~~~~~~~~~~~~~~~~ 089ffc14 stlrb w20, [x0]
288 0x~~~~~~~~~~~~~~~~ 48147c15 stxrh w20, w21, [x0]
300 0x~~~~~~~~~~~~~~~~ 6a15029f tst w20, w21
[all …]
Dlog-cpufeatures-custom57 0x~~~~~~~~~~~~~~~~ 1ad652b4 crc32cb w20, w21, w22 ### {CRC32} ###
91 0x~~~~~~~~~~~~~~~~ 4a150293 eor w19, w20, w21
112 0x~~~~~~~~~~~~~~~~ 28405013 ldnp w19, w20, [x0]
164 0x~~~~~~~~~~~~~~~~ 78c03014 ldursh w20, [x0, #3]
181 0x~~~~~~~~~~~~~~~~ 1ad52693 lsr w19, w20, w21
205 0x~~~~~~~~~~~~~~~~ 5a1503f4 ngc w20, w21
220 0x~~~~~~~~~~~~~~~~ 5ac006b4 rev16 w20, w21
238 0x~~~~~~~~~~~~~~~~ 089ffc14 stlrb w20, [x0]
288 0x~~~~~~~~~~~~~~~~ 48147c15 stxrh w20, w21, [x0]
300 0x~~~~~~~~~~~~~~~~ 6a15029f tst w20, w21
[all …]
/third_party/vixl/test/aarch64/
Dtest-disasm-aarch64.cc286 COMPARE(add(w18, w19, Operand(w20, ASR, 5)), "add w18, w19, w20, asr #5"); in TEST()
312 COMPARE(sub(w18, w19, Operand(w20, ASR, 5)), "sub w18, w19, w20, asr #5"); in TEST()
394 COMPARE(sbcs(w18, w19, Operand(w20)), "sbcs w18, w19, w20"); in TEST()
499 COMPARE(cls(w20, w21), "cls w20, w21"); in TEST()
547 COMPARE(asr(w20, w21, 10), "asr w20, w21, #10"); in TEST()
591 COMPARE(crc32b(w10, w20, w30), "crc32b w10, w20, w30"); in TEST()
772 COMPARE(eon(w19, w20, Operand(0x80000001)), "eor w19, w20, #0x7ffffffe"); in TEST()
885 COMPARE(rorv(w18, w19, w20), "ror w18, w19, w20"); in TEST()
1140 COMPARE(strb(w20, MemOperand(x21, 255, PreIndex)), "strb w20, [x21, #255]!"); in TEST()
1177 COMPARE(strh(w20, MemOperand(x21, 255, PreIndex)), "strh w20, [x21, #255]!"); in TEST()
[all …]
Dtest-assembler-aarch64.cc417 __ Mov(w20, Operand(w11, SXTB, 1)); in TEST()
4676 __ Add(w20, w4, -2000); in TEST()
4694 ASSERT_EQUAL_32(398000, w20); in TEST()
5529 ASSERT_EQUAL_32(NFlag, w20); // Negative and sign-extended in TEST()
5722 __ Cmp(w20, Operand(w21, LSL, 1)); in TEST()
5734 __ Cmp(w20, Operand(w25, ASR, 2)); in TEST()
5766 __ Mov(w20, 0x2); in TEST()
5774 __ Cmp(w20, Operand(w21, LSL, 1)); in TEST()
5869 __ Mov(w20, 0); in TEST()
5871 __ Cmp(w20, Operand(w20)); in TEST()
[all …]
Dtest-trace-aarch64.cc113 __ crc32cb(w20, w21, w22); in GenerateTestSequenceBase()
147 __ eor(w19, w20, w21); in GenerateTestSequenceBase()
168 __ ldnp(w19, w20, MemOperand(x0)); in GenerateTestSequenceBase()
220 __ ldursh(w20, MemOperand(x0, 3)); in GenerateTestSequenceBase()
237 __ lsrv(w19, w20, w21); in GenerateTestSequenceBase()
261 __ ngc(w20, w21); in GenerateTestSequenceBase()
276 __ rev16(w20, w21); in GenerateTestSequenceBase()
294 __ stlrb(w20, MemOperand(x0)); in GenerateTestSequenceBase()
344 __ stxrh(w20, w21, MemOperand(x0)); in GenerateTestSequenceBase()
356 __ tst(w20, w21); in GenerateTestSequenceBase()
[all …]
/third_party/node/deps/v8/src/codegen/loong64/
Dregister-loong64.h37 V(w16) V(w17) V(w18) V(w19) V(w20) V(w21) V(w22) V(w23) \
/third_party/node/deps/v8/src/codegen/mips/
Dregister-mips.h43 V(w16) V(w17) V(w18) V(w19) V(w20) V(w21) V(w22) V(w23) \
/third_party/node/deps/v8/src/codegen/mips64/
Dregister-mips64.h43 V(w16) V(w17) V(w18) V(w19) V(w20) V(w21) V(w22) V(w23) \
/third_party/ffmpeg/libpostproc/
Dpostprocess_template.c997 "movq "MANGLE(w20)", %%mm2 \n\t" // 32 in RENAME()
1048 NAMED_CONSTRAINTS_ADD(w05,w20) in RENAME()
3018 "movq "MANGLE(w20)", %%mm2 \n\t" // 32 in RENAME()
3071 NAMED_CONSTRAINTS_ADD(w05,w20) in RENAME()
/third_party/node/deps/v8/src/execution/mips/
Dsimulator-mips.h218 w20, enumerator
/third_party/node/deps/v8/src/execution/mips64/
Dsimulator-mips64.h218 w20, enumerator

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