| /arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_be/src/litecg/ |
| D | lmir_builder.cpp | 707 inline Expr CreateBinOpInternal(MIRBuilder &mirBuilder, Opcode op, Type *type, Expr src1, Expr src2) in CreateBinOpInternal()
713 Expr LMIRBuilder::Add(Type *type, Expr src1, Expr src2) in Add()
718 Expr LMIRBuilder::Sub(Type *type, Expr src1, Expr src2) in Sub()
723 Expr LMIRBuilder::Mul(Type *type, Expr src1, Expr src2) in Mul()
728 Expr LMIRBuilder::UDiv(Type *type, Expr src1, Expr src2) in UDiv()
733 Expr LMIRBuilder::SDiv(Type *type, Expr src1, Expr src2) in SDiv()
738 Expr LMIRBuilder::URem(Type *type, Expr src1, Expr src2) in URem()
743 Expr LMIRBuilder::SRem(Type *type, Expr src1, Expr src2) in SRem()
748 Expr LMIRBuilder::Shl(Type *type, Expr src1, Expr src2) in Shl()
753 Expr LMIRBuilder::LShr(Type *type, Expr src1, Expr src2) in LShr()
[all …]
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| /arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_be/src/cg/x86_64/ |
| D | x64_standardize.cpp | 54 Operand &src2 = insn.GetOperand(kInsnThirdOpnd); in StdzBasicOp() local
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| D | x64_cgfunc.cpp | 796 RegOperand *X64CGFunc::SelectVectorPairwiseAdalp(Operand *src1, PrimType sty1, Operand *src2, PrimT… in SelectVectorPairwiseAdalp()
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| /arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/ |
| D | encode.h | 348 … [[maybe_unused]] Reg src2, [[maybe_unused]] Reg src3, [[maybe_unused]] Condition cc) in EncodeSelect()
354 … [[maybe_unused]] Reg src2, [[maybe_unused]] Reg src3, [[maybe_unused]] Condition cc) in EncodeSelectTest()
389 …l void EncodeRotate([[maybe_unused]] Reg dst, [[maybe_unused]] Reg src1, [[maybe_unused]] Reg src2, in EncodeRotate()
441 … [[maybe_unused]] Reg src2, [[maybe_unused]] Imm imm, [[maybe_unused]] Condition cc) in EncodeSelect()
447 … [[maybe_unused]] Reg src2, [[maybe_unused]] Imm imm, [[maybe_unused]] Condition cc) in EncodeSelectTest()
469 [[maybe_unused]] Reg src2) in EncodeMAdd()
475 [[maybe_unused]] Reg src2) in EncodeMSub()
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| D | codegen.cpp | 2561 auto src2 = enc->GetCodegen()->ConvertRegister(inst->GetSrcReg(IMM_2), type); in VisitMAdd() local
2573 auto src2 = enc->GetCodegen()->ConvertRegister(inst->GetSrcReg(IMM_2), type); in VisitMSub() local
3137 …auto src2 = enc->GetCodegen()->ConvertRegister(inst->GetSrcReg(2), DataType::INT32); // length in VisitLoadCompressedStringChar() local
3584 …auto src2 = enc->GetCodegen()->ConvertRegister(inst->GetSrcReg(2U), type); // store … in VisitStore() local
5049 auto src2 = enc->GetCodegen()->ConvertRegister(inst->GetSrcReg(IMM_2), cmpType); in VisitSelect() local
5069 auto src2 = enc->GetCodegen()->ConvertRegister(inst->GetSrcReg(IMM_2), cmpType); in VisitSelectImm() local
5236 auto src2 = enc->GetCodegen()->ConvertRegister(inst->GetSrcReg(IMM_2), type); // first value in VisitStoreArrayPair() local
5270 auto src2 = enc->GetCodegen()->ConvertRegister(inst->GetSrcReg(IMM_2), type); // second value in VisitStoreArrayPairI() local
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| /arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/target/aarch64/ |
| D | encode.cpp | 645 void Aarch64Encoder::EncodeRotate(Reg dst, Reg src1, Reg src2, bool isRor) in EncodeRotate()
2209 void Aarch64Encoder::EncodeSelect(Reg dst, Reg src0, Reg src1, Reg src2, Reg src3, Condition cc) in EncodeSelect()
2223 void Aarch64Encoder::EncodeSelect(Reg dst, Reg src0, Reg src1, Reg src2, Imm imm, Condition cc) in EncodeSelect()
2237 void Aarch64Encoder::EncodeSelectTest(Reg dst, Reg src0, Reg src1, Reg src2, Reg src3, Condition cc) in EncodeSelectTest()
2248 void Aarch64Encoder::EncodeSelectTest(Reg dst, Reg src0, Reg src1, Reg src2, Imm imm, Condition cc) in EncodeSelectTest()
2298 void Aarch64Encoder::EncodeMAdd(Reg dst, Reg src0, Reg src1, Reg src2) in EncodeMAdd()
2322 void Aarch64Encoder::EncodeMSub(Reg dst, Reg src0, Reg src1, Reg src2) in EncodeMSub()
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| /arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/target/amd64/ |
| D | encode.cpp | 1821 void Amd64Encoder::EncodeSelect(Reg dst, Reg src0, Reg src1, Reg src2, Reg src3, Condition cc) in EncodeSelect()
1857 void Amd64Encoder::EncodeSelect(Reg dst, Reg src0, Reg src1, Reg src2, Imm imm, Condition cc) in EncodeSelect()
1882 void Amd64Encoder::EncodeSelectTest(Reg dst, Reg src0, Reg src1, Reg src2, Reg src3, Condition cc) in EncodeSelectTest()
1900 void Amd64Encoder::EncodeSelectTest(Reg dst, Reg src0, Reg src1, Reg src2, Imm imm, Condition cc) in EncodeSelectTest()
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| /arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/target/aarch32/ |
| D | encode.cpp | 2663 void Aarch32Encoder::EncodeSelect(Reg dst, Reg src0, Reg src1, Reg src2, Reg src3, Condition cc) in EncodeSelect()
2678 void Aarch32Encoder::EncodeSelect(Reg dst, Reg src0, Reg src1, Reg src2, Imm imm, Condition cc) in EncodeSelect()
2725 void Aarch32Encoder::EncodeSelectTest(Reg dst, Reg src0, Reg src1, Reg src2, Reg src3, Condition cc) in EncodeSelectTest()
2740 void Aarch32Encoder::EncodeSelectTest(Reg dst, Reg src0, Reg src1, Reg src2, Imm imm, Condition cc) in EncodeSelectTest()
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| /arkcompiler/runtime_core/compiler/tests/ |
| D | compiler_regalloc_test.cpp | 830 Location src2(Location::Kind::STACK, 30); // It's random number in __anonb7fcf74c1202() local
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| /arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_be/src/cg/ |
| D | cgfunc.cpp | 534 Operand *src2 = cgFunc.HandleExpr(intrnNode, *arg2); /* vector src operand 2 */ in HandleVectorPairwiseAdalp() local
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| /arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_be/src/cg/aarch64/ |
| D | aarch64_cgfunc.cpp | 11884 RegOperand *AArch64CGFunc::SelectVectorPairwiseAdalp(Operand *src1, PrimType sty1, Operand *src2, P… in SelectVectorPairwiseAdalp()
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