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Searched refs:amdgpu_ring_emit_wreg (Results 1 – 19 of 19) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
Dgmc_v10_0.c444 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_lo32 + in gmc_v10_0_emit_flush_gpu_tlb()
448 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_hi32 + in gmc_v10_0_emit_flush_gpu_tlb()
464 amdgpu_ring_emit_wreg(ring, hub->vm_inv_eng0_sem + in gmc_v10_0_emit_flush_gpu_tlb()
481 amdgpu_ring_emit_wreg(ring, reg, pasid); in gmc_v10_0_emit_pasid_mapping()
Dgmc_v9_0.c936 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_lo32 + in gmc_v9_0_emit_flush_gpu_tlb()
940 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_hi32 + in gmc_v9_0_emit_flush_gpu_tlb()
956 amdgpu_ring_emit_wreg(ring, hub->vm_inv_eng0_sem + in gmc_v9_0_emit_flush_gpu_tlb()
977 amdgpu_ring_emit_wreg(ring, reg, pasid); in gmc_v9_0_emit_pasid_mapping()
Dnbio_v6_1.c61 amdgpu_ring_emit_wreg(ring, SOC15_REG_OFFSET( in nbio_v6_1_hdp_flush()
Dnbio_v7_0.c69amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> … in nbio_v7_0_hdp_flush()
Dnbio_v2_3.c78amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> … in nbio_v2_3_hdp_flush()
Dgmc_v6_0.c370 amdgpu_ring_emit_wreg(ring, reg, pd_addr >> 12); in gmc_v6_0_emit_flush_gpu_tlb()
373 amdgpu_ring_emit_wreg(ring, mmVM_INVALIDATE_REQUEST, 1 << vmid); in gmc_v6_0_emit_flush_gpu_tlb()
Dgmc_v7_0.c485 amdgpu_ring_emit_wreg(ring, reg, pd_addr >> 12); in gmc_v7_0_emit_flush_gpu_tlb()
488 amdgpu_ring_emit_wreg(ring, mmVM_INVALIDATE_REQUEST, 1 << vmid); in gmc_v7_0_emit_flush_gpu_tlb()
496 amdgpu_ring_emit_wreg(ring, mmIH_VMID_0_LUT + vmid, pasid); in gmc_v7_0_emit_pasid_mapping()
Damdgpu_ring.c326 amdgpu_ring_emit_wreg(ring, reg0, ref); in amdgpu_ring_emit_reg_write_reg_wait_helper()
Dgmc_v8_0.c694 amdgpu_ring_emit_wreg(ring, reg, pd_addr >> 12); in gmc_v8_0_emit_flush_gpu_tlb()
697 amdgpu_ring_emit_wreg(ring, mmVM_INVALIDATE_REQUEST, 1 << vmid); in gmc_v8_0_emit_flush_gpu_tlb()
705 amdgpu_ring_emit_wreg(ring, mmIH_VMID_0_LUT + vmid, pasid); in gmc_v8_0_emit_pasid_mapping()
Dnbio_v7_4.c91amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> … in nbio_v7_4_hdp_flush()
Damdgpu_ring.h272 #define amdgpu_ring_emit_wreg(r, d, v) (r)->funcs->emit_wreg((r), (d), (v)) macro
Dvi.c967 amdgpu_ring_emit_wreg(ring, mmHDP_MEM_COHERENCY_FLUSH_CNTL, 1); in vi_flush_hdp()
978 amdgpu_ring_emit_wreg(ring, mmHDP_DEBUG0, 1); in vi_invalidate_hdp()
Dcik.c1830 amdgpu_ring_emit_wreg(ring, mmHDP_MEM_COHERENCY_FLUSH_CNTL, 1); in cik_flush_hdp()
1841 amdgpu_ring_emit_wreg(ring, mmHDP_DEBUG0, 1); in cik_invalidate_hdp()
Damdgpu_gfx.c786 amdgpu_ring_emit_wreg(ring, reg, v); in amdgpu_kiq_wreg()
Dsi.c1373 amdgpu_ring_emit_wreg(ring, mmHDP_MEM_COHERENCY_FLUSH_CNTL, 1); in si_flush_hdp()
1384 amdgpu_ring_emit_wreg(ring, mmHDP_DEBUG0, 1); in si_invalidate_hdp()
Dnv.c603 amdgpu_ring_emit_wreg(ring, SOC15_REG_OFFSET( in nv_invalidate_hdp()
Dsoc15.c851 amdgpu_ring_emit_wreg(ring, SOC15_REG_OFFSET( in soc15_invalidate_hdp()
Dsdma_v5_2.c1152 amdgpu_ring_emit_wreg(ring, reg0, ref); in sdma_v5_2_ring_emit_reg_write_reg_wait()
Dsdma_v5_0.c1215 amdgpu_ring_emit_wreg(ring, reg0, ref); in sdma_v5_0_ring_emit_reg_write_reg_wait()