Searched refs:gfx11 (Results 1 – 14 of 14) sorted by relevance
| /third_party/mesa3d/src/amd/addrlib/ |
| D | meson.build | 43 'src/gfx11/gfx11addrlib.cpp',
44 'src/gfx11/gfx11addrlib.h',
45 'src/gfx11/gfx11SwizzlePattern.h',
48 'src/chip/gfx11/gfx11_gb_reg.h',
80 'src/chip/gfx10', 'src/chip/gfx11',
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| /third_party/mesa3d/src/amd/common/ |
| D | meson.build | 30 '../registers/gfx11.json',
35 '../registers/gfx11-rsrc.json',
59 '../../util/format/u_format.csv', '../registers/gfx10-rsrc.json', '../registers/gfx11-rsrc.json'
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| D | ac_surface.c | 1438 sin.forbiddenBlock.gfx11.thin256KB = 1; in gfx9_get_preferred_swizzle_mode()
1439 sin.forbiddenBlock.gfx11.thick256KB = 1; in gfx9_get_preferred_swizzle_mode()
1466 sin.forbiddenBlock.gfx11.thin256KB = 1; in gfx9_get_preferred_swizzle_mode()
1467 sin.forbiddenBlock.gfx11.thick256KB = 1; in gfx9_get_preferred_swizzle_mode()
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| /third_party/mesa3d/src/amd/addrlib/src/gfx11/ |
| D | gfx11addrlib.h | 483 …allowedBlockSet.gfx11.thin256KB = (allowedSwModeSet.value & Gfx11Rsrc3dThin256KBSwModeMask) ? TR… in GetAllowedBlockSet()
484 …allowedBlockSet.gfx11.thick256KB = (allowedSwModeSet.value & Gfx11Rsrc3dThick256KBSwModeMask) ? TR… in GetAllowedBlockSet()
490 …allowedBlockSet.gfx11.thin256KB = (allowedSwModeSet.value & Gfx11Blk256KBSwModeMask) ? TRUE : FALS… in GetAllowedBlockSet()
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| D | gfx11addrlib.cpp | 2454 pIn->forbiddenBlock.gfx11.thin256KB ? 0 : in HwlGetPreferredSurfaceSetting()
2457 pIn->forbiddenBlock.gfx11.thick256KB ? 0 : in HwlGetPreferredSurfaceSetting()
2679 allowedBlockSet.gfx11.thin256KB = 0; in HwlGetPreferredSurfaceSetting()
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| /third_party/mesa3d/docs/relnotes/ |
| D | 22.2.0.rst | 850 - radv: Mark all formats as DCC compatible with each other on gfx11.
851 - radv: gfx11 register changes.
853 - radv: Add gfx11 DCC fast clear support.
854 - radv: Disable transform feedback for gfx11.
1070 - radeonsi/vcn: enable vcn 4.0 encode for gfx11 asic
2675 - radeonsi/gfx11: VRS changes
2699 - radeonsi/gfx11: update codec support for gfx11
2700 - radeonsi/vcn: add decode software ring support for gfx11
2701 - radeonsi/vcn: add jpeg decode support for gfx11
3897 - amd/registers: add gfx11 to the json generator
[all …]
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| D | 22.2.4.rst | 147 - radeonsi/gfx11: fix compute scratch buffer - WAVES is always per SE
169 - ac/llvm: fix gfx11 fs input load for 16bit varying
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| D | 22.2.1.rst | 184 - radeonsi/gfx11: don't set VERTS_PER_SUBGRP to 0
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| D | 21.0.0.rst | 3194 - aco/tests: Fix GFX10_3 being printed as gfx11
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| D | 22.0.0.rst | 1561 - iris: Merge gfx11\_ and gfx12_upload_pixel_hashing_tables() into the same function.
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| /third_party/mesa3d/src/intel/common/ |
| D | meson.build | 114 ['90', 'gfx9'], ['110', 'gfx11'], ['120', 'gfx12'],
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| /third_party/mesa3d/src/intel/vulkan/ |
| D | meson.build | 30 '--device-prefix', 'gfx11', '--device-prefix', 'gfx12',
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| /third_party/mesa3d/src/intel/tools/ |
| D | meson.build | 211 ['icl', 'gfx11'],
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| /third_party/mesa3d/src/amd/addrlib/inc/ |
| D | addrinterface.h | 3766 } gfx11; member
3854 } gfx11; member
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