Lines Matching refs:gen6

1083 -  i965: Add support for POW in gen6 FS.
1132 -  i965: Add gen6 attribute interpolation to new FS backend.
1133 -  i965: Fix the gen6 jump size for BREAK/CONT in new FS.
1135 -  i965: Pre-gen6, map VS outputs (not FS inputs) to URB setup in the
1155 -  i965: In disasm, gen6 fb writes don't put msg reg # in
1157 -  i965: Add support for gen6 FB writes to the new FS.
1160 -  i965: Add back gen6 headerless FB writes to the new FS backend.
1162 -  i965: Fix up IF/ELSE/ENDIF for gen6.
1165 -  i965: Don't do 1/w multiplication in new FS for gen6
1168 -  i965: Add support for gl_FrontFacing on gen6.
1169 -  i965: Don't assume that WPOS is always provided on gen6 in the new
1171 -  i965: Fix gen6 pointsize handling to match pre-gen6.
1172 -  i965: Disable emitting if () statements on gen6 until we really fix
1179 -  i965: Fix gen6 WM push constants updates.
1180 -  i965: Fix new FS gen6 interpolation for sparsely-populated arrays.
1181 -  i965: Enable attribute swizzling (repositioning) in the gen6 SF.
1191 -  i965: Don't consider gen6 math instructions to write to MRFs.
1192 -  i965: Add a couple of checks for gen6 math instruction limits.
1193 -  i965: Don't compute-to-MRF in gen6 math instructions.
1194 -  i965: Expand uniform args to gen6 math to full registers to get
1196 -  i965: Don't compute-to-MRF in gen6 VS math.
1197 -  i965: Fix gen6 pixel_[xy] setup to avoid mixing int and float src
1199 -  i965: Always use the new FS backend on gen6.
1213 -  i965: Enable the new FS backend on pre-gen6 as well.
1215 -  i965: Set the type of the null register to fix gen6 FS comparisons.
1218 -  i965: Fix assertion failure on gen6 BufferSubData to busy BO.
1219 -  i965: Assert out on gen6 VS constant buffer reads that hang the GPU
1221 -  i965: Fix scissor-offscreen on gen6 like we did pre-gen6.
1222 -  i965: Avoid blits in BufferCopySubdata on gen6.
1223 -  i965: Tell the shader compiler when we expect depth writes for gen6.
1224 -  i965: Remove the gen6 emit_mi_flushes I sprinkled around the driver.
1226 -  i965: Add EU emit support for gen6's new IF instruction with
1228 -  i965: Set the source operand types for gen6 if/else/endif to integer.
1230    gen6.
1232 -  i965: Fix gl_FrontFacing emit on pre-gen6.
1243 -  i965: Use SENDC on the first render target write on gen6.
1244 -  i965: Clear some undefined fields of g0 when using them for gen6 FB
1247 -  i965: Add support for discard instructions on gen6.
1250 -  i965: Set up the constant buffer on gen6 when it's needed.
1251 -  i965: Add support for constant buffer loads on gen6.
1254 -  i965: Disable register spilling on gen6 until it's fixed.
1257 -  i965: Add user clip planes support to gen6.
1258 -  i965: Update gen6 SF state when point state (sprite or attenuation)
1260 -  i965: Upload required gen6 VS push constants even when using pull
1262 -  i965: Update the gen6 stencil ref state when stencil state changes.
1278 -  i965: Add support for math on constants in gen6 brw_wm_glsl.c path.
1279 -  i965: Work around strangeness in swizzling/masking of gen6 math.
1280 -  i965: re-enable gen6 IF statements in the fragment shader.
1288 -  i965: Fail on loops on gen6 for now until we write the EU emit code
1308 -  i965: Use the new embedded compare in SEL on gen6 for VS MIN and MAX
1319 -  i965: Dump the WHILE jump distance on gen6.
1320 -  i965: Add support for gen6 DO/WHILE ISA emit.
1321 -  i965: Add support for gen6 BREAK ISA emit.
1322 -  i965: Add support for gen6 CONTINUE instruction emit.
1331 -  i965: Update gen6 WM state on compiled program change, not just FP
1333 -  i965: Update gen6 SF state on fragment program change too.
1336 -  i965: Provide delta_xy reg to gen6 non-GLSL path PINTERP.
1337 -  i965: Fix up 16-wide gen6 FB writes after various refactoring.
1338 -  i965: Don't smash a group of coordinates doing gen6 16-wide sampler
1340 -  i965: Fix gen6 interpolation setup for 16-wide.
1341 -  i965: Fix up gen6 samplers for their usage by brw_wm_emit.c
1342 -  i965: Make the sampler's implied move on gen6 be a raw move.
1343 -  i965: Align gen6 push constant size to dispatch width.
1344 -  i965: Add support for the instruction compression bits on gen6.
1348 -  i965: Handle saturates on gen6 math instructions.
1352 -  i965: Work around gen6 ignoring source modifiers on math
1354 -  i965: Fix flipped value of the not-embedded-in-if on gen6.
1355 -  i965: Don't try to store gen6 (float) blend constant color in bytes.
1356 -  i965: Set up the color masking for the first drawbuffer on gen6.
1357 -  i965: Set up the per-render-target blend state on gen6.
1358 -  i965: Set the render target index in gen6 fixed-function/ARB_fp path.
1359 -  i965: Use the new pixel mask location for gen6 ARB_fp KIL
1365 -  i965: Fix VS constants regression pre-gen6.
1369 -  i965: Set render_cache_read_write surface state bit on gen6 constant
1380 -  i965: Fix ARL to work on gen6.
1381 -  i956: Fix the old FP path fragment position setup on gen6.
1382 -  i965: Fix gl_FragCoord.z setup on gen6.
1383 -  i965: Add support for using the BLT ring on gen6.
1390 -  i965: Set the alternative floating point mode on gen6 VS and WM.
1391 -  i965: Add support for gen6 constant-index constant loading.
1392 -  i965: Add support for gen6 reladdr VS constant loading.
1393 -  i965: Improve the hacks for ARB_fp scalar^scalar POW on gen6.
1395 -  i965: Fix regression in FS comparisons on original gen4 due to gen6
2033 -  i965: Fix incorrect batchbuffer size in gen6 clip state command.
2124 -  i965: Flatten if-statements beyond depth 16 on pre-gen6.
2894    gen6