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Lines Matching refs:AddrSurfInfoOut

633                               ADDR_COMPUTE_SURFACE_INFO_OUTPUT *AddrSurfInfoOut,  in gfx6_compute_level()  argument
688 ret = AddrComputeSurfaceInfo(addrlib, AddrSurfInfoIn, AddrSurfInfoOut); in gfx6_compute_level()
695 surf_level->offset_256B = align64(surf->surf_size, AddrSurfInfoOut->baseAlign) / 256; in gfx6_compute_level()
696 surf_level->slice_size_dw = AddrSurfInfoOut->sliceSize / 4; in gfx6_compute_level()
697 surf_level->nblk_x = AddrSurfInfoOut->pitch; in gfx6_compute_level()
698 surf_level->nblk_y = AddrSurfInfoOut->height; in gfx6_compute_level()
700 switch (AddrSurfInfoOut->tileMode) { in gfx6_compute_level()
717 surf->u.legacy.zs.stencil_tiling_index[level] = AddrSurfInfoOut->tileIndex; in gfx6_compute_level()
719 surf->u.legacy.tiling_index[level] = AddrSurfInfoOut->tileIndex; in gfx6_compute_level()
723 surf->prt_tile_width = AddrSurfInfoOut->pitchAlign; in gfx6_compute_level()
724 surf->prt_tile_height = AddrSurfInfoOut->heightAlign; in gfx6_compute_level()
725 surf->prt_tile_depth = AddrSurfInfoOut->depthAlign; in gfx6_compute_level()
734 surf->surf_size = (uint64_t)surf_level->offset_256B * 256 + AddrSurfInfoOut->surfSize; in gfx6_compute_level()
744 AddrDccIn->colorSurfSize = AddrSurfInfoOut->surfSize; in gfx6_compute_level()
745 AddrDccIn->tileMode = AddrSurfInfoOut->tileMode; in gfx6_compute_level()
746 AddrDccIn->tileInfo = *AddrSurfInfoOut->pTileInfo; in gfx6_compute_level()
747 AddrDccIn->tileIndex = AddrSurfInfoOut->tileIndex; in gfx6_compute_level()
748 AddrDccIn->macroModeIndex = AddrSurfInfoOut->macroModeIndex; in gfx6_compute_level()
786 AddrDccIn->colorSurfSize = AddrSurfInfoOut->sliceSize; in gfx6_compute_level()
787 AddrDccIn->tileMode = AddrSurfInfoOut->tileMode; in gfx6_compute_level()
788 AddrDccIn->tileInfo = *AddrSurfInfoOut->pTileInfo; in gfx6_compute_level()
789 AddrDccIn->tileIndex = AddrSurfInfoOut->tileIndex; in gfx6_compute_level()
790 AddrDccIn->macroModeIndex = AddrSurfInfoOut->macroModeIndex; in gfx6_compute_level()
819 AddrHtileIn->flags.tcCompatible = AddrSurfInfoOut->tcCompatible; in gfx6_compute_level()
820 AddrHtileIn->pitch = AddrSurfInfoOut->pitch; in gfx6_compute_level()
821 AddrHtileIn->height = AddrSurfInfoOut->height; in gfx6_compute_level()
822 AddrHtileIn->numSlices = AddrSurfInfoOut->depth; in gfx6_compute_level()
825 AddrHtileIn->pTileInfo = AddrSurfInfoOut->pTileInfo; in gfx6_compute_level()
826 AddrHtileIn->tileIndex = AddrSurfInfoOut->tileIndex; in gfx6_compute_level()
827 AddrHtileIn->macroModeIndex = AddrSurfInfoOut->macroModeIndex; in gfx6_compute_level()
1027 ADDR_COMPUTE_SURFACE_INFO_OUTPUT AddrSurfInfoOut = {0}; in gfx6_compute_surface() local
1037 AddrSurfInfoOut.size = sizeof(ADDR_COMPUTE_SURFACE_INFO_OUTPUT); in gfx6_compute_surface()
1042 AddrSurfInfoOut.pTileInfo = &AddrTileInfoOut; in gfx6_compute_surface()
1219 AddrSurfInfoOut.macroModeIndex = cik_get_macro_tile_index(surf); in gfx6_compute_surface()
1237 &AddrSurfInfoOut, &AddrDccIn, &AddrDccOut, &AddrHtileIn, in gfx6_compute_surface()
1245 if (!AddrSurfInfoOut.tcCompatible) { in gfx6_compute_surface()
1252 AddrSurfInfoIn.tileIndex = AddrSurfInfoOut.tileIndex; in gfx6_compute_surface()
1253 stencil_tile_idx = AddrSurfInfoOut.stencilTileIdx; in gfx6_compute_surface()
1258 r = gfx6_surface_settings(addrlib, info, config, &AddrSurfInfoOut, surf); in gfx6_compute_surface()
1276 &AddrSurfInfoOut, &AddrDccIn, &AddrDccOut, NULL, NULL); in gfx6_compute_surface()
1290 r = gfx6_surface_settings(addrlib, info, config, &AddrSurfInfoOut, surf); in gfx6_compute_surface()
1296 if (AddrSurfInfoOut.tileMode >= ADDR_TM_2D_TILED_THIN1) { in gfx6_compute_surface()
1297 surf->u.legacy.stencil_tile_split = AddrSurfInfoOut.pTileInfo->tileSplitBytes; in gfx6_compute_surface()
1313 fin.tileMode = AddrSurfInfoOut.tileMode; in gfx6_compute_surface()
1314 fin.pitch = AddrSurfInfoOut.pitch; in gfx6_compute_surface()