BUILD.gn - OpenGrok cross reference for /third

Lines Matching refs:riscv64
559         v8_current_cpu == "arm64" || v8_current_cpu == "riscv64",
560     "Sharing a pointer compression cage is only supported on x64,arm64 and riscv64")
623   if (v8_current_cpu == "riscv64") {
695   if (current_cpu == "riscv64") {
1190   if (v8_current_cpu == "riscv64") {
1294         v8_current_cpu == "mips64el" || v8_current_cpu == "riscv64") {
2474   } else if (v8_current_cpu == "riscv64") {
2476       ### gcmole(arch:riscv64) ###
2477       "src/builtins/riscv64/builtins-riscv64.cc",
3861   } else if (v8_current_cpu == "riscv64") {
3862     sources += [  ### gcmole(arch:riscv64) ###
3863       "src/baseline/riscv64/baseline-assembler-riscv64-inl.h",
3864       "src/baseline/riscv64/baseline-compiler-riscv64-inl.h",
3865       "src/codegen/riscv64/assembler-riscv64-inl.h",
3866       "src/codegen/riscv64/assembler-riscv64.h",
3867       "src/codegen/riscv64/constants-riscv64.h",
3868       "src/codegen/riscv64/macro-assembler-riscv64.h",
3869       "src/codegen/riscv64/register-riscv64.h",
3870       "src/codegen/riscv64/reglist-riscv64.h",
3871       "src/compiler/backend/riscv64/instruction-codes-riscv64.h",
3872       "src/execution/riscv64/frame-constants-riscv64.h",
3873       "src/execution/riscv64/simulator-riscv64.h",
3874       "src/regexp/riscv64/regexp-macro-assembler-riscv64.h",
3875       "src/wasm/baseline/riscv64/liftoff-assembler-riscv64.h",
4851   } else if (v8_current_cpu == "riscv64") {
4852     sources += [  ### gcmole(arch:riscv64) ###
4853       "src/baseline/riscv64/baseline-assembler-riscv64-inl.h",
4854       "src/baseline/riscv64/baseline-compiler-riscv64-inl.h",
4855       "src/codegen/riscv64/assembler-riscv64-inl.h",
4856       "src/codegen/riscv64/assembler-riscv64.cc",
4857       "src/codegen/riscv64/constants-riscv64.cc",
4858       "src/codegen/riscv64/cpu-riscv64.cc",
4859       "src/codegen/riscv64/interface-descriptors-riscv64-inl.h",
4860       "src/codegen/riscv64/macro-assembler-riscv64.cc",
4861       "src/compiler/backend/riscv64/code-generator-riscv64.cc",
4862       "src/compiler/backend/riscv64/instruction-scheduler-riscv64.cc",
4863       "src/compiler/backend/riscv64/instruction-selector-riscv64.cc",
4864       "src/deoptimizer/riscv64/deoptimizer-riscv64.cc",
4865       "src/diagnostics/riscv64/disasm-riscv64.cc",
4866       "src/diagnostics/riscv64/unwinder-riscv64.cc",
4867       "src/execution/riscv64/frame-constants-riscv64.cc",
4868       "src/execution/riscv64/simulator-riscv64.cc",
4869       "src/regexp/riscv64/regexp-macro-assembler-riscv64.cc",
4959       v8_current_cpu == "riscv64") {
5355   if (v8_current_cpu == "riscv64") {
5444   if (v8_current_cpu == "riscv64") {
5536     } else if (current_cpu == "riscv64") {
5537       sources += [ "src/heap/base/asm/riscv64/push_registers_asm.cc" ]
6340   if (v8_current_cpu == "riscv64") {