Searched defs:ASR (Results 1 – 11 of 11) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.h | 40 ASR, ///< Arithmetic shift right. enumerator
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.h | 454 ASR, enumerator
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64AddressingModes.h | 36 ASR, enumerator
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Utils/ |
| D | FunctionComparator.cpp | 665 unsigned int ASR = GEPR->getPointerAddressSpace(); in cmpGEPs() local
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| /third_party/node/deps/v8/src/codegen/arm/ |
| D | constants-arm.h | 230 ASR = 2 << 5, // Arithmetic shift right. enumerator
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| /third_party/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 98 ### ASR ### subsection
6465 ### ASR ### subsection
6475 ### ASR ### subsection
6482 ### ASR ### subsection
6492 ### ASR ### subsection
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| /third_party/vixl/src/aarch32/ |
| D | instructions-aarch32.h | 1054 enum ShiftType { LSL = 0x0, LSR = 0x1, ASR = 0x2, ROR = 0x3, RRX = 0x4 }; enumerator
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| /third_party/skia/src/core/ |
| D | SkVM.h | 330 enum Shift { LSL,LSR,ASR,ROR }; enumerator
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| D | constants-arm64.h | 364 ASR = 0x2, enumerator
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| D | IceTargetLoweringARM32.cpp | 2610 const bool ASR = Op == InstArithmetic::Ashr; in lowerInt64Arithmetic() local
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| /third_party/vixl/src/aarch64/ |
| D | constants-aarch64.h | 352 ASR = 0x2, enumerator
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