| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonPeephole.cpp | 139 Register DstReg = Dst.getReg(); in runOnMachineFunction() local
160 Register DstReg = Dst.getReg(); in runOnMachineFunction() local
177 Register DstReg = Dst.getReg(); in runOnMachineFunction() local
188 Register DstReg = Dst.getReg(); in runOnMachineFunction() local
211 Register DstReg = Dst.getReg(); in runOnMachineFunction() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRExpandPseudoInsts.cpp | 69 unsigned DstReg) { in buildMI()
145 Register DstReg = MI.getOperand(0).getReg(); in expandArith() local
178 Register DstReg = MI.getOperand(0).getReg(); in expandLogic() local
225 Register DstReg = MI.getOperand(0).getReg(); in expandLogicImm() local
277 unsigned DstReg = MI.getOperand(0).getReg(); in expand() local
329 unsigned DstReg = MI.getOperand(0).getReg(); in expand() local
392 unsigned DstReg = MI.getOperand(0).getReg(); in expand() local
422 unsigned DstReg = MI.getOperand(0).getReg(); in expand() local
455 unsigned DstReg = MI.getOperand(0).getReg(); in expand() local
490 unsigned DstReg = MI.getOperand(0).getReg(); in expand() local
[all …]
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| D | AVRRegisterInfo.cpp | 98 static void foldFrameOffset(MachineBasicBlock::iterator &II, int &Offset, unsigned DstReg) { in foldFrameOffset()
161 Register DstReg = MI.getOperand(0).getReg(); in eliminateFrameIndex() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ExpandPseudoInsts.cpp | 112 Register DstReg = MI.getOperand(0).getReg(); in expandMOVImm() local
156 Register DstReg = MI.getOperand(0).getReg(); in expandMOVImm() local
482 Register DstReg = MI.getOperand(0).getReg(); in expandMI() local
517 unsigned DstReg = MI.getOperand(0).getReg(); in expandMI() local
555 Register DstReg = MI.getOperand(0).getReg(); in expandMI() local
599 Register DstReg = MI.getOperand(0).getReg(); in expandMI() local
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| D | AArch64InstructionSelector.cpp | 587 const Register DstReg = I.getOperand(0).getReg(); in isValidCopy() local
648 Register DstReg = I.getOperand(0).getReg(); in getRegClassesForCopy() local
674 Register DstReg = I.getOperand(0).getReg(); in selectCopy() local
1100 Register DstReg = I.getOperand(0).getReg(); in selectVectorSHL() local
1138 Register DstReg = I.getOperand(0).getReg(); in selectVectorASHR() local
1227 Register DstReg = ForceDstReg in materializeLargeCMVal() local
1243 Register DstReg = BuildMovK(MovZ.getReg(0), in materializeLargeCMVal() local
1545 Register DstReg = I.getOperand(0).getReg(); in select() local
1676 Register DstReg = I.getOperand(0).getReg(); in select() local
1902 Register DstReg = I.getOperand(0).getReg(); in select() local
[all …]
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| D | AArch64RedundantCopyElimination.cpp | 186 MCPhysReg DstReg = PredI.getOperand(0).getReg(); in knownRegValInBlock() local
252 MCPhysReg DstReg = PredI.getOperand(0).getReg(); in knownRegValInBlock() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | LegalizationArtifactCombiner.h | 54 Register DstReg = MI.getOperand(0).getReg(); in tryCombineAnyExt() local
103 Register DstReg = MI.getOperand(0).getReg(); in tryCombineZExt() local
147 Register DstReg = MI.getOperand(0).getReg(); in tryCombineSExt() local
174 Register DstReg = MI.getOperand(0).getReg(); in tryCombineTrunc() local
206 Register DstReg = MI.getOperand(0).getReg(); in tryFoldImplicitDef() local
442 Register DstReg = MI.getOperand(0).getReg(); in tryCombineExtract() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstructionSelector.cpp | 233 Register DstReg = I.getOperand(0).getReg(); in selectCopy() local
691 MachineInstr &I, MachineRegisterInfo &MRI, const unsigned DstReg, in selectTurnIntoCOPY()
712 const Register DstReg = I.getOperand(0).getReg(); in selectTruncOrPtrToInt() local
776 const Register DstReg = I.getOperand(0).getReg(); in selectZext() local
887 const Register DstReg = I.getOperand(0).getReg(); in selectAnyext() local
1084 const Register DstReg = I.getOperand(0).getReg(); in selectUadde() local
1144 const Register DstReg = I.getOperand(0).getReg(); in selectExtract() local
1195 bool X86InstructionSelector::emitExtractSubreg(unsigned DstReg, unsigned SrcReg, in emitExtractSubreg()
1233 bool X86InstructionSelector::emitInsertSubreg(unsigned DstReg, unsigned SrcReg, in emitInsertSubreg()
1276 const Register DstReg = I.getOperand(0).getReg(); in selectInsert() local
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 195 void LegalizerHelper::insertParts(Register DstReg, in insertParts()
620 Register DstReg = MI.getOperand(0).getReg(); in narrowScalar() local
733 Register DstReg = MRI.createGenericVirtualRegister(NarrowTy); in narrowScalar() local
746 Register DstReg = MI.getOperand(0).getReg(); in narrowScalar() local
766 Register DstReg = MRI.createGenericVirtualRegister(NarrowTy); in narrowScalar() local
795 Register DstReg = MI.getOperand(0).getReg(); in narrowScalar() local
814 Register DstReg = MI.getOperand(0).getReg(); in narrowScalar() local
1073 Register DstReg = MI.getOperand(0).getReg(); in narrowScalar() local
1181 Register DstReg = MI.getOperand(0).getReg(); in widenScalarMergeValues() local
1340 Register DstReg = MI.getOperand(0).getReg(); in widenScalarExtract() local
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | OptimizePHIs.cpp | 101 Register DstReg = MI->getOperand(0).getReg(); in IsSingleValuePHICycle() local
145 Register DstReg = MI->getOperand(0).getReg(); in IsDeadPHICycle() local
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| D | TwoAddressInstructionPass.cpp | 408 unsigned &SrcReg, unsigned &DstReg, in isCopyToReg()
491 unsigned SrcReg, DstReg; in isKilled() local
502 static bool isTwoAddrUse(MachineInstr &MI, unsigned Reg, unsigned &DstReg) { in isTwoAddrUse()
523 unsigned &DstReg, bool &IsDstPhys) { in findOnlyInterestingUse()
773 TwoAddressInstructionPass::scanUses(unsigned DstReg) { in scanUses()
834 unsigned SrcReg, DstReg; in processCopy() local
895 unsigned DstReg; in rescheduleMIBelowKill() local
1080 unsigned DstReg; in rescheduleKillAboveMI() local
1475 Register DstReg = DstMO.getReg(); in collectTiedOperands() local
1743 Register DstReg = mi->getOperand(DstIdx).getReg(); in runOnMachineFunction() local
[all …]
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| D | RegisterCoalescer.h | 31 unsigned DstReg = 0; variable
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| D | ExpandPostRAPseudos.cpp | 83 Register DstReg = MI->getOperand(0).getReg(); in LowerSubregToReg() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
| D | BPFMISimplifyPatchable.cpp | 147 Register &DstReg, const GlobalValue *GVal) { in processCandidate()
179 Register &DstReg, Register &SrcReg, const GlobalValue *GVal, in processDstReg()
254 Register DstReg = MI.getOperand(0).getReg(); in removeLD() local
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| D | BPFMIPeephole.cpp | 187 Register DstReg = MI.getOperand(0).getReg(); in eliminateZExtSeq() local
414 Register DstReg, SrcReg; in eliminateTruncSeq() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | R600ExpandSpecialInstrs.cpp | 138 Register DstReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
208 Register DstReg = in runOnMachineFunction() local
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| D | AMDGPUInstructionSelector.cpp | 98 Register DstReg = Dst.getReg(); in selectCOPY() local
210 Register DstReg = MRI->createVirtualRegister(&SubRC); in getSubOperand64() local
255 Register DstReg = Dst.getReg(); in selectG_AND_OR_XOR() local
296 Register DstReg = I.getOperand(0).getReg(); in selectG_ADD_SUB() local
450 Register DstReg = I.getOperand(0).getReg(); in selectG_EXTRACT() local
487 Register DstReg = MI.getOperand(0).getReg(); in selectG_MERGE_VALUES() local
588 Register DstReg = I.getOperand(0).getReg(); in selectG_INSERT() local
651 Register DstReg = I.getOperand(0).getReg(); in selectG_INTRINSIC() local
1093 Register DstReg = MI.getOperand(0).getReg(); in selectDSOrderedIntrinsic() local
1176 Register DstReg = I.getOperand(0).getReg(); in selectG_SELECT() local
[all …]
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| D | SILowerI1Copies.cpp | 510 Register DstReg = MI.getOperand(0).getReg(); in lowerCopiesFromI1() local
570 Register DstReg = MI->getOperand(0).getReg(); in lowerPhis() local
681 Register DstReg = MI.getOperand(0).getReg(); in lowerCopiesToI1() local
816 const DebugLoc &DL, unsigned DstReg, in buildMergeLaneMasks()
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| D | AMDGPURegisterBankInfo.cpp | 67 Register DstReg = MI.getOperand(0).getReg(); in applyBank() local
94 Register DstReg = MI.getOperand(0).getReg(); in applyBank() local
1116 Register DstReg = MI.getOperand(0).getReg(); in applyMappingWideLoad() local
1435 bool AMDGPURegisterBankInfo::buildVCopy(MachineIRBuilder &B, Register DstReg, in buildVCopy()
1475 Register DstReg = MI.getOperand(0).getReg(); in applyMappingImpl() local
1532 Register DstReg = MI.getOperand(BoolDstOp).getReg(); in applyMappingImpl() local
1562 Register DstReg = MI.getOperand(0).getReg(); in applyMappingImpl() local
1643 Register DstReg = MI.getOperand(0).getReg(); in applyMappingImpl() local
1716 Register DstReg = MI.getOperand(0).getReg(); in applyMappingImpl() local
1742 Register DstReg = MI.getOperand(0).getReg(); in applyMappingImpl() local
[all …]
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| D | SIFixSGPRCopies.cpp | 171 Register DstReg = Copy.getOperand(0).getReg(); in getCopyRegClasses() local
207 Register DstReg = MI.getOperand(0).getReg(); in tryChangeVGPRtoSGPRinCopy() local
246 Register DstReg = MI.getOperand(0).getReg(); in foldVGPRCopyIntoRegSequence() local
612 Register DstReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCDuplexInfo.cpp | 191 unsigned DstReg, PredReg, SrcReg, Src1Reg, Src2Reg; in getDuplexCandidateGroup() local
542 unsigned DstReg, SrcReg; in subInstWouldBeExtended() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMExpandPseudoInsts.cpp | 484 Register DstReg = MI.getOperand(OpIdx++).getReg(); in ExpandVLD() local
683 unsigned DstReg = 0; in ExpandLaneOp() local
832 Register DstReg = MI.getOperand(0).getReg(); in ExpandMOV32BitImm() local
1451 Register DstReg = MI.getOperand(0).getReg(); in ExpandMI() local
1473 Register DstReg = MI.getOperand(0).getReg(); in ExpandMI() local
1531 Register DstReg = MI.getOperand(0).getReg(); in ExpandMI() local
1595 Register DstReg = MI.getOperand(OpIdx++).getReg(); in ExpandMI() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 732 Register DstReg = I->getOperand(0).getReg(); in expandPseudoMTLoHi() local
749 unsigned DstReg = Dst.getReg(), SrcReg = Src.getReg(), TmpReg = DstReg; in expandCvtFPInt() local
771 Register DstReg = I->getOperand(0).getReg(); in expandExtractElementF64() local
813 Register DstReg = I->getOperand(0).getReg(); in expandBuildPairF64() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| D | MSP430RegisterInfo.cpp | 142 Register DstReg = MI.getOperand(0).getReg(); in eliminateFrameIndex() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVInstrInfo.cpp | 90 const DebugLoc &DL, MCRegister DstReg, in copyPhysReg()
142 unsigned DstReg, int FI, in loadRegFromStackSlot()
166 const DebugLoc &DL, Register DstReg, uint64_t Val, in movImm()
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