1 /* 2 ************************************************************************************************************************ 3 * 4 * Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE 23 * 24 ***********************************************************************************************************************/ 25 26 /** 27 **************************************************************************************************** 28 * @file egbaddrlib.h 29 * @brief Contains the EgBasedLib class definition. 30 **************************************************************************************************** 31 */ 32 33 #ifndef __EG_BASED_ADDR_LIB_H__ 34 #define __EG_BASED_ADDR_LIB_H__ 35 36 #include "addrlib1.h" 37 38 namespace Addr 39 { 40 namespace V1 41 { 42 /// Structures for functions 43 struct CoordFromBankPipe 44 { 45 UINT_32 xBits : 3; 46 UINT_32 yBits : 4; 47 48 UINT_32 xBit3 : 1; 49 UINT_32 xBit4 : 1; 50 UINT_32 xBit5 : 1; 51 UINT_32 yBit3 : 1; 52 UINT_32 yBit4 : 1; 53 UINT_32 yBit5 : 1; 54 UINT_32 yBit6 : 1; 55 }; 56 57 /** 58 **************************************************************************************************** 59 * @brief This class is the Evergreen based address library 60 * @note Abstract class 61 **************************************************************************************************** 62 */ 63 class EgBasedLib : public Lib 64 { 65 protected: 66 EgBasedLib(const Client* pClient); 67 virtual ~EgBasedLib(); 68 69 public: 70 71 /// Surface info functions 72 73 // NOTE: DispatchComputeSurfaceInfo using TileInfo takes both an input and an output. 74 // On input: 75 // One or more fields may be 0 to be calculated/defaulted - pre-SI h/w. 76 // H/W using tile mode index only accepts none or all 0's - SI and newer h/w. 77 // It then returns the actual tiling configuration used. 78 // Other methods' TileInfo must be valid on entry 79 BOOL_32 DispatchComputeSurfaceInfo( 80 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, 81 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 82 83 ADDR_E_RETURNCODE DispatchComputeFmaskInfo( 84 const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, 85 ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut); 86 87 protected: 88 // Hwl interface 89 virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfo( 90 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, 91 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 92 93 virtual ADDR_E_RETURNCODE HwlComputeSurfaceAddrFromCoord( 94 const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, 95 ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; 96 97 virtual ADDR_E_RETURNCODE HwlComputeSurfaceCoordFromAddr( 98 const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, 99 ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const; 100 101 virtual ADDR_E_RETURNCODE HwlComputeSliceTileSwizzle( 102 const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn, 103 ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut) const; 104 105 virtual ADDR_E_RETURNCODE HwlExtractBankPipeSwizzle( 106 const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn, 107 ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut) const; 108 109 virtual ADDR_E_RETURNCODE HwlCombineBankPipeSwizzle( 110 UINT_32 bankSwizzle, UINT_32 pipeSwizzle, ADDR_TILEINFO* pTileInfo, 111 UINT_64 baseAddr, UINT_32* pTileSwizzle) const; 112 113 virtual ADDR_E_RETURNCODE HwlComputeBaseSwizzle( 114 const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn, 115 ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) const; 116 117 virtual ADDR_E_RETURNCODE HwlConvertTileInfoToHW( 118 const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, 119 ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const; 120 121 virtual UINT_32 HwlComputeHtileBpp( 122 BOOL_32 isWidth8, BOOL_32 isHeight8) const; 123 124 virtual UINT_32 HwlComputeHtileBaseAlign( 125 BOOL_32 isTcCompatible, BOOL_32 isLinear, ADDR_TILEINFO* pTileInfo) const; 126 127 virtual ADDR_E_RETURNCODE HwlComputeFmaskInfo( 128 const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, 129 ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut); 130 131 virtual ADDR_E_RETURNCODE HwlComputeFmaskAddrFromCoord( 132 const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, 133 ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const; 134 135 virtual ADDR_E_RETURNCODE HwlComputeFmaskCoordFromAddr( 136 const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, 137 ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const; 138 139 virtual BOOL_32 HwlGetAlignmentInfoMacroTiled( 140 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, 141 UINT_32* pPitchAlign, UINT_32* pHeightAlign, UINT_32* pSizeAlign) const; 142 143 virtual UINT_32 HwlComputeQbStereoRightSwizzle( 144 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pInfo) const; 145 146 virtual VOID HwlComputePixelCoordFromOffset( 147 UINT_32 offset, UINT_32 bpp, UINT_32 numSamples, 148 AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits, 149 UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample, 150 AddrTileType microTileType, BOOL_32 isDepthSampleOrder) const; 151 152 /// Return Cmask block max HwlGetMaxCmaskBlockMax()153 virtual BOOL_32 HwlGetMaxCmaskBlockMax() const 154 { 155 return 0x3FFF; // 14 bits, 0n16383 156 } 157 158 // Sub-hwl interface 159 /// Pure virtual function to setup tile info (indices) if client requests to do so 160 virtual VOID HwlSetupTileInfo( 161 AddrTileMode tileMode, ADDR_SURFACE_FLAGS flags, 162 UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, 163 ADDR_TILEINFO* inputTileInfo, ADDR_TILEINFO* outputTileInfo, 164 AddrTileType inTileType, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0; 165 166 /// Pure virtual function to get pitch alignment for linear modes 167 virtual UINT_32 HwlGetPitchAlignmentLinear(UINT_32 bpp, ADDR_SURFACE_FLAGS flags) const = 0; 168 169 /// Pure virtual function to get size adjustment for linear modes 170 virtual UINT_64 HwlGetSizeAdjustmentLinear( 171 AddrTileMode tileMode, 172 UINT_32 bpp, UINT_32 numSamples, UINT_32 baseAlign, UINT_32 pitchAlign, 173 UINT_32 *pPitch, UINT_32 *pHeight, UINT_32 *pHeightAlign) const = 0; 174 175 virtual UINT_32 HwlGetPitchAlignmentMicroTiled( 176 AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples) const; 177 178 virtual UINT_64 HwlGetSizeAdjustmentMicroTiled( 179 UINT_32 thickness, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples, 180 UINT_32 baseAlign, UINT_32 pitchAlign, 181 UINT_32 *pPitch, UINT_32 *pHeight) const; 182 183 /// Pure virtual function to do extra sanity check 184 virtual BOOL_32 HwlSanityCheckMacroTiled( 185 ADDR_TILEINFO* pTileInfo) const = 0; 186 187 /// Pure virtual function to check current level to be the last macro tiled one 188 virtual VOID HwlCheckLastMacroTiledLvl( 189 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, 190 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0; 191 192 /// Adjusts bank before bank is modified by rotation 193 virtual UINT_32 HwlPreAdjustBank( 194 UINT_32 tileX, UINT_32 bank, ADDR_TILEINFO* pTileInfo) const = 0; 195 196 virtual VOID HwlComputeSurfaceCoord2DFromBankPipe( 197 AddrTileMode tileMode, UINT_32* pX, UINT_32* pY, UINT_32 slice, 198 UINT_32 bank, UINT_32 pipe, 199 UINT_32 bankSwizzle, UINT_32 pipeSwizzle, UINT_32 tileSlices, 200 BOOL_32 ignoreSE, 201 ADDR_TILEINFO* pTileInfo) const = 0; 202 203 virtual BOOL_32 HwlTileInfoEqual( 204 const ADDR_TILEINFO* pLeft, const ADDR_TILEINFO* pRight) const; 205 206 virtual AddrTileMode HwlDegradeThickTileMode( 207 AddrTileMode baseTileMode, UINT_32 numSlices, UINT_32* pBytesPerTile) const; 208 209 virtual INT_32 HwlPostCheckTileIndex( 210 const ADDR_TILEINFO* pInfo, AddrTileMode mode, AddrTileType type, 211 INT curIndex = TileIndexInvalid) const 212 { 213 return TileIndexInvalid; 214 } 215 HwlFmaskPreThunkSurfInfo(const ADDR_COMPUTE_FMASK_INFO_INPUT * pFmaskIn,const ADDR_COMPUTE_FMASK_INFO_OUTPUT * pFmaskOut,ADDR_COMPUTE_SURFACE_INFO_INPUT * pSurfIn,ADDR_COMPUTE_SURFACE_INFO_OUTPUT * pSurfOut)216 virtual VOID HwlFmaskPreThunkSurfInfo( 217 const ADDR_COMPUTE_FMASK_INFO_INPUT* pFmaskIn, 218 const ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut, 219 ADDR_COMPUTE_SURFACE_INFO_INPUT* pSurfIn, 220 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut) const 221 { 222 } 223 HwlFmaskPostThunkSurfInfo(const ADDR_COMPUTE_SURFACE_INFO_OUTPUT * pSurfOut,ADDR_COMPUTE_FMASK_INFO_OUTPUT * pFmaskOut)224 virtual VOID HwlFmaskPostThunkSurfInfo( 225 const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut, 226 ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut) const 227 { 228 } 229 230 virtual UINT_32 HwlStereoCheckRightOffsetPadding(ADDR_TILEINFO* pTileInfo) const; 231 232 virtual BOOL_32 HwlReduceBankWidthHeight( 233 UINT_32 tileSize, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples, 234 UINT_32 bankHeightAlign, UINT_32 pipes, 235 ADDR_TILEINFO* pTileInfo) const; 236 237 // Protected non-virtual functions 238 239 /// Mip level functions 240 AddrTileMode ComputeSurfaceMipLevelTileMode( 241 AddrTileMode baseTileMode, UINT_32 bpp, 242 UINT_32 pitch, UINT_32 height, UINT_32 numSlices, UINT_32 numSamples, 243 UINT_32 pitchAlign, UINT_32 heightAlign, 244 ADDR_TILEINFO* pTileInfo) const; 245 246 /// Swizzle functions 247 VOID ExtractBankPipeSwizzle( 248 UINT_32 base256b, ADDR_TILEINFO* pTileInfo, 249 UINT_32* pBankSwizzle, UINT_32* pPipeSwizzle) const; 250 251 UINT_32 GetBankPipeSwizzle( 252 UINT_32 bankSwizzle, UINT_32 pipeSwizzle, 253 UINT_64 baseAddr, ADDR_TILEINFO* pTileInfo) const; 254 255 UINT_32 ComputeSliceTileSwizzle( 256 AddrTileMode tileMode, UINT_32 baseSwizzle, UINT_32 slice, UINT_64 baseAddr, 257 ADDR_TILEINFO* pTileInfo) const; 258 259 /// Addressing functions ComputeBankEquation(UINT_32 log2BytesPP,UINT_32 threshX,UINT_32 threshY,ADDR_TILEINFO * pTileInfo,ADDR_EQUATION * pEquation)260 virtual ADDR_E_RETURNCODE ComputeBankEquation( 261 UINT_32 log2BytesPP, UINT_32 threshX, UINT_32 threshY, 262 ADDR_TILEINFO* pTileInfo, ADDR_EQUATION* pEquation) const 263 { 264 return ADDR_NOTSUPPORTED; 265 } 266 267 UINT_32 ComputeBankFromCoord( 268 UINT_32 x, UINT_32 y, UINT_32 slice, 269 AddrTileMode tileMode, UINT_32 bankSwizzle, UINT_32 tileSpitSlice, 270 ADDR_TILEINFO* pTileInfo) const; 271 272 UINT_32 ComputeBankFromAddr( 273 UINT_64 addr, UINT_32 numBanks, UINT_32 numPipes) const; 274 275 UINT_32 ComputePipeRotation( 276 AddrTileMode tileMode, UINT_32 numPipes) const; 277 278 UINT_32 ComputeBankRotation( 279 AddrTileMode tileMode, UINT_32 numBanks, 280 UINT_32 numPipes) const; 281 282 VOID ComputeSurfaceCoord2DFromBankPipe( 283 AddrTileMode tileMode, UINT_32 x, UINT_32 y, UINT_32 slice, 284 UINT_32 bank, UINT_32 pipe, 285 UINT_32 bankSwizzle, UINT_32 pipeSwizzle, UINT_32 tileSlices, 286 ADDR_TILEINFO* pTileInfo, 287 CoordFromBankPipe *pOutput) const; 288 289 /// Htile/Cmask functions 290 UINT_64 ComputeHtileBytes( 291 UINT_32 pitch, UINT_32 height, UINT_32 bpp, 292 BOOL_32 isLinear, UINT_32 numSlices, UINT_64* sliceBytes, UINT_32 baseAlign) const; 293 294 ADDR_E_RETURNCODE ComputeMacroTileEquation( 295 UINT_32 log2BytesPP, AddrTileMode tileMode, AddrTileType microTileType, 296 ADDR_TILEINFO* pTileInfo, ADDR_EQUATION* pEquation) const; 297 298 // Static functions 299 static BOOL_32 IsTileInfoAllZero(const ADDR_TILEINFO* pTileInfo); 300 static UINT_32 ComputeFmaskNumPlanesFromNumSamples(UINT_32 numSamples); 301 static UINT_32 ComputeFmaskResolvedBppFromNumSamples(UINT_32 numSamples); 302 HwlComputeSurfaceAlignmentsMacroTiled(AddrTileMode tileMode,UINT_32 bpp,ADDR_SURFACE_FLAGS flags,UINT_32 mipLevel,UINT_32 numSamples,ADDR_COMPUTE_SURFACE_INFO_OUTPUT * pOut)303 virtual VOID HwlComputeSurfaceAlignmentsMacroTiled( 304 AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, 305 UINT_32 mipLevel, UINT_32 numSamples, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const 306 { 307 } 308 309 private: 310 311 BOOL_32 ComputeSurfaceInfoLinear( 312 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, 313 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut, 314 UINT_32 padDims) const; 315 316 BOOL_32 ComputeSurfaceInfoMicroTiled( 317 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, 318 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut, 319 UINT_32 padDims, 320 AddrTileMode expTileMode) const; 321 322 BOOL_32 ComputeSurfaceInfoMacroTiled( 323 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, 324 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut, 325 UINT_32 padDims, 326 AddrTileMode expTileMode) const; 327 328 BOOL_32 ComputeSurfaceAlignmentsLinear( 329 AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, 330 UINT_32* pBaseAlign, UINT_32* pPitchAlign, UINT_32* pHeightAlign) const; 331 332 BOOL_32 ComputeSurfaceAlignmentsMicroTiled( 333 AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, 334 UINT_32 mipLevel, UINT_32 numSamples, 335 UINT_32* pBaseAlign, UINT_32* pPitchAlign, UINT_32* pHeightAlign) const; 336 337 BOOL_32 ComputeSurfaceAlignmentsMacroTiled( 338 AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, 339 UINT_32 mipLevel, UINT_32 numSamples, 340 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 341 342 /// Surface addressing functions 343 UINT_64 DispatchComputeSurfaceAddrFromCoord( 344 const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, 345 ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; 346 347 VOID DispatchComputeSurfaceCoordFromAddr( 348 const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, 349 ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const; 350 351 UINT_64 ComputeSurfaceAddrFromCoordMicroTiled( 352 UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample, 353 UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, 354 AddrTileMode tileMode, 355 AddrTileType microTileType, BOOL_32 isDepthSampleOrder, 356 UINT_32* pBitPosition) const; 357 358 UINT_64 ComputeSurfaceAddrFromCoordMacroTiled( 359 UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample, 360 UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, 361 AddrTileMode tileMode, 362 AddrTileType microTileType, BOOL_32 ignoreSE, BOOL_32 isDepthSampleOrder, 363 UINT_32 pipeSwizzle, UINT_32 bankSwizzle, 364 ADDR_TILEINFO* pTileInfo, 365 UINT_32* pBitPosition) const; 366 367 VOID ComputeSurfaceCoordFromAddrMacroTiled( 368 UINT_64 addr, UINT_32 bitPosition, 369 UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, 370 AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits, 371 AddrTileType microTileType, BOOL_32 ignoreSE, BOOL_32 isDepthSampleOrder, 372 UINT_32 pipeSwizzle, UINT_32 bankSwizzle, 373 ADDR_TILEINFO* pTileInfo, 374 UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample) const; 375 376 /// Fmask functions 377 UINT_64 DispatchComputeFmaskAddrFromCoord( 378 const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, 379 ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const; 380 381 VOID DispatchComputeFmaskCoordFromAddr( 382 const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, 383 ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const; 384 385 // FMASK related methods - private 386 UINT_64 ComputeFmaskAddrFromCoordMicroTiled( 387 UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample, UINT_32 plane, 388 UINT_32 pitch, UINT_32 height, UINT_32 numSamples, AddrTileMode tileMode, 389 BOOL_32 resolved, UINT_32* pBitPosition) const; 390 391 VOID ComputeFmaskCoordFromAddrMicroTiled( 392 UINT_64 addr, UINT_32 bitPosition, 393 UINT_32 pitch, UINT_32 height, UINT_32 numSamples, 394 AddrTileMode tileMode, BOOL_32 resolved, 395 UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample, UINT_32* pPlane) const; 396 397 VOID ComputeFmaskCoordFromAddrMacroTiled( 398 UINT_64 addr, UINT_32 bitPosition, 399 UINT_32 pitch, UINT_32 height, UINT_32 numSamples, AddrTileMode tileMode, 400 UINT_32 pipeSwizzle, UINT_32 bankSwizzle, 401 BOOL_32 ignoreSE, 402 ADDR_TILEINFO* pTileInfo, 403 BOOL_32 resolved, 404 UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample, UINT_32* pPlane) const; 405 406 UINT_64 ComputeFmaskAddrFromCoordMacroTiled( 407 UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample, UINT_32 plane, 408 UINT_32 pitch, UINT_32 height, UINT_32 numSamples, 409 AddrTileMode tileMode, UINT_32 pipeSwizzle, UINT_32 bankSwizzle, 410 BOOL_32 ignoreSE, 411 ADDR_TILEINFO* pTileInfo, 412 BOOL_32 resolved, 413 UINT_32* pBitPosition) const; 414 415 /// Sanity check functions 416 BOOL_32 SanityCheckMacroTiled( 417 ADDR_TILEINFO* pTileInfo) const; 418 419 protected: 420 UINT_32 m_ranks; ///< Number of ranks - MC_ARB_RAMCFG.NOOFRANK 421 UINT_32 m_logicalBanks; ///< Logical banks = m_banks * m_ranks if m_banks != 16 422 UINT_32 m_bankInterleave; ///< Bank interleave, as a multiple of pipe interleave size 423 }; 424 425 } // V1 426 } // Addr 427 428 #endif 429 430