| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | RegisterCoalescer.h | 55 const TargetRegisterClass *NewRC = nullptr; variable
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| D | CriticalAntiDepBreaker.cpp | 192 const TargetRegisterClass *NewRC = nullptr; in PrescanInstruction() local
320 const TargetRegisterClass *NewRC = nullptr; in ScanInstruction() local
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| D | MachineRegisterInfo.cpp | 74 const TargetRegisterClass *NewRC = in constrainRegClass() local
125 const TargetRegisterClass *NewRC = in recomputeRegClass() local
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| D | TailDuplicator.cpp | 440 auto *NewRC = MI->getRegClassConstraint(i, TII, TRI); in duplicateInstruction() local
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| D | PeepholeOptimizer.cpp | 761 const TargetRegisterClass *NewRC = MRI.getRegClass(SrcRegs[0].Reg); in insertPHI() local
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| D | RegisterCoalescer.cpp | 1319 const TargetRegisterClass *NewRC = CP.getNewRC(); in reMaterializeTrivialDef() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRRegisterInfo.cpp | 281 const TargetRegisterClass *NewRC, in shouldCoalesce()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonRegisterInfo.cpp | 243 const TargetRegisterClass *NewRC, LiveIntervals &LIS) const { in shouldCoalesce() argument
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| D | HexagonVLIWPacketizer.cpp | 354 const TargetRegisterClass *NewRC) { in isNewifiable()
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| D | HexagonBitSimplify.cpp | 2618 BitTracker::RegisterCell NewRC(W); in simplifyRCmp0() local
2686 BitTracker::RegisterCell NewRC(W); in simplifyRCmp0() local
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| D | HexagonFrameLowering.cpp | 2094 const TargetRegisterClass *NewRC) -> const TargetRegisterClass * { in optimizeSpillSlots()
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| D | HexagonConstPropagation.cpp | 2896 const TargetRegisterClass *NewRC; in rewriteHexConstDefs() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZRegisterInfo.cpp | 345 const TargetRegisterClass *NewRC, in shouldCoalesce()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.cpp | 841 const TargetRegisterClass *NewRC, in shouldCoalesce()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 951 const TargetRegisterClass *NewRC, in shouldCoalesce()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Analysis/ |
| D | LazyCallGraph.cpp | 1725 RefSCC *NewRC = createRefSCC(*this); in buildRefSCCs() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.cpp | 1706 const TargetRegisterClass *NewRC, in shouldCoalesce()
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| D | SIISelLowering.cpp | 10467 auto *NewRC = TRI->getEquivalentVGPRClass(RC); in AdjustInstrPostInstrSelection() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 3846 const TargetRegisterClass *NewRC = in transformToImmFormFedByLI() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstrInfo.cpp | 4643 auto *NewRC = MRI.constrainRegClass( in updateOperandRegConstraints() local
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