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1 /*
2  * Copyright (c) 2023-2024 Huawei Device Co., Ltd.
3  * Licensed under the Apache License, Version 2.0 (the "License");
4  * you may not use this file except in compliance with the License.
5  * You may obtain a copy of the License at
6  *
7  * http://www.apache.org/licenses/LICENSE-2.0
8  *
9  * Unless required by applicable law or agreed to in writing, software
10  * distributed under the License is distributed on an "AS IS" BASIS,
11  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12  * See the License for the specific language governing permissions and
13  * limitations under the License.
14  */
15 
16 #ifndef UNWIND_X86_64_DEFINE_H
17 #define UNWIND_X86_64_DEFINE_H
18 
19 #include <cinttypes>
20 #include <string>
21 #if is_ohos
22 #include <ucontext.h>
23 #endif
24 #include <vector>
25 
26 namespace OHOS {
27 namespace HiviewDFX {
28 #define REGS_PRINT_LEN 512
29 #define DWARF_PRESERVED_REGS_NUM 17
30 
31 enum RegsEnumX86_64 : uint16_t {
32     REG_X86_64_RAX = 0,
33     REG_X86_64_RDX,
34     REG_X86_64_RCX,
35     REG_X86_64_RBX,
36     REG_X86_64_RSI,
37     REG_X86_64_RDI,
38     REG_X86_64_RBP,
39     REG_X86_64_RSP,
40     REG_X86_64_R8,
41     REG_X86_64_R9,
42     REG_X86_64_R10,
43     REG_X86_64_R11,
44     REG_X86_64_R12,
45     REG_X86_64_R13,
46     REG_X86_64_R14,
47     REG_X86_64_R15,
48     REG_X86_64_RIP,
49     REG_X86_64_LAST,
50 
51     REG_SP = REG_X86_64_RSP,
52     REG_PC = REG_X86_64_RIP,
53     REG_EH = REG_X86_64_RAX,
54     REG_LAST = REG_X86_64_LAST,
55 };
56 
57 enum RegsX86_64_Map : uint16_t {
58     R15 = 0,
59     R14,
60     R13,
61     R12,
62     RBP,
63     RBX,
64     R11,
65     R10,
66     R9,
67     R8,
68     RAX,
69     RCX,
70     RDX,
71     RSI,
72     RDI,
73     RIP = 16,
74     RSP = 19,
75 };
76 
77 struct RegsUserX86_64 {
78     uint64_t r15;
79     uint64_t r14;
80     uint64_t r13;
81     uint64_t r12;
82     uint64_t rbp;
83     uint64_t rbx;
84     uint64_t r11;
85     uint64_t r10;
86     uint64_t r9;
87     uint64_t r8;
88     uint64_t rax;
89     uint64_t rcx;
90     uint64_t rdx;
91     uint64_t rsi;
92     uint64_t rdi;
93     uint64_t orig_rax;
94     uint64_t rip;
95     uint64_t cs;
96     uint64_t eflags;
97     uint64_t rsp;
98     uint64_t ss;
99     uint64_t fs_base;
100     uint64_t gs_base;
101     uint64_t ds;
102     uint64_t es;
103     uint64_t fs;
104     uint64_t gs;
105 };
106 
107 static const std::vector<uint16_t> QUT_REGS {
108     REG_X86_64_RBP,
109     REG_X86_64_RSP,
110     REG_X86_64_RIP,
111 };
112 #if is_ohos
113 typedef ucontext_t UnwindUContext_t;
114 #endif
115 } // namespace HiviewDFX
116 } // namespace OHOS
117 #endif
118