Searched defs:RegA (Results 1 – 6 of 6) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86WinAllocaExpander.cpp | 219 unsigned RegA = Is64Bit ? X86::RAX : X86::EAX; in lower() local
233 unsigned RegA = Is64Bit ? X86::RAX : X86::EAX; in lower() local
247 unsigned RegA = Is64BitAlloca ? X86::RAX : X86::EAX; in lower() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
| D | MCRegisterInfo.h | 553 bool isSubRegister(MCRegister RegA, MCRegister RegB) const { in isSubRegister()
561 bool isSubRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSubRegisterEq()
567 bool isSuperRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSuperRegisterEq()
573 bool isSuperOrSubRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSuperOrSubRegisterEq()
649 inline bool MCRegisterInfo::isSuperRegister(MCRegister RegA, MCRegister RegB) const{ in isSuperRegister()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TwoAddressInstructionPass.cpp | 561 regsAreCompatible(unsigned RegA, unsigned RegB, const TargetRegisterInfo *TRI) { in regsAreCompatible()
702 Register RegA = MI->getOperand(DstIdx).getReg(); in commuteInstruction() local
712 TwoAddressInstructionPass::isProfitableToConv3Addr(unsigned RegA,unsigned RegB){ in isProfitableToConv3Addr()
731 unsigned RegA, unsigned RegB, in convertInstTo3Addr()
1522 Register RegA = DstMO.getReg(); in processTiedPairs() local
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| D | ImplicitNullChecks.cpp | 282 Register RegA = MOA.getReg(); in canReorder() local
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| D | TargetInstrInfo.cpp | 809 Register RegA = OpA.getReg(); in reassociateOps() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrInfo.cpp | 2102 for (auto &RegA : DefsA) in isDependent() local
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