| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | RegisterCoalescer.h | 40 unsigned SrcIdx = 0; variable
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| D | TwoAddressInstructionPass.cpp | 1271 unsigned SrcIdx, unsigned DstIdx, in tryInstructionTransform()
1467 for (unsigned SrcIdx = 0; SrcIdx < NumOps; ++SrcIdx) { in collectTiedOperands() local
1518 unsigned SrcIdx = TiedPairs[tpi].first; in processTiedPairs() local
1740 unsigned SrcIdx = TiedPairs[0].first; in runOnMachineFunction() local
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| D | TargetRegisterInfo.cpp | 352 unsigned SrcIdx, DefIdx; in shareSameRegisterFile() local
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| D | RegisterCoalescer.cpp | 1238 unsigned SrcIdx = CP.isFlipped() ? CP.getDstIdx() : CP.getSrcIdx(); in reMaterializeTrivialDef() local
1799 unsigned SrcIdx = CP.getSrcIdx(); in joinCopy() local
3392 unsigned SrcIdx = CP.getSrcIdx(); in joinVirtRegs() local
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| D | PeepholeOptimizer.cpp | 1845 unsigned SrcIdx = Def->getNumOperands(); in getNextSourceFromBitcast() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86MCInstLower.cpp | 2275 unsigned SrcIdx, MaskIdx; in EmitInstruction() local
2333 unsigned SrcIdx, MaskIdx; in EmitInstruction() local
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| D | X86InstrInfo.cpp | 1633 unsigned SrcIdx = (Imm >> 6) & 3; in commuteInstructionImpl() local
4741 unsigned SrcIdx = (Imm >> 6) & 3; in foldMemoryOperandCustom() local
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| D | X86ISelLowering.cpp | 7038 unsigned SrcIdx = M / Size; in getTargetShuffleAndZeroables() local
7330 unsigned SrcIdx = SrcExtract.getConstantOperandVal(1); in getFauxShuffleMask() local
7653 uint64_t SrcIdx = N->getConstantOperandVal(1); in getShuffleScalarElt() local
12173 int SrcIdx = i + Offset; in lowerShuffleAsSpecificZeroOrAnyExtend() local
34711 unsigned SrcIdx = (InsertPSMask >> 6) & 0x3; in combineTargetShuffle() local
37129 int SrcIdx = Mask[N->getConstantOperandVal(1)]; in combineExtractWithShuffle() local
39539 unsigned SrcIdx = Lane * NumSrcEltsPerLane + Elt % NumSrcEltsPerLane; in combineVectorPack() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | R600InstrInfo.cpp | 315 int SrcIdx = getOperandIdx(MI.getOpcode(), OpTable[j][0]); in getSrcs() local
1400 MachineOperand &R600InstrInfo::getFlagOp(MachineInstr &MI, unsigned SrcIdx, in getFlagOp()
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| D | R600ISelLowering.cpp | 2069 bool R600TargetLowering::FoldOperand(SDNode *ParentNode, unsigned SrcIdx, in FoldOperand()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Scalar/ |
| D | InferAddressSpaces.cpp | 961 int SrcIdx = U.getOperandNo(); in rewriteWithNewAddressSpaces() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineSimplifyDemanded.cpp | 1030 for (unsigned SrcIdx = 0; SrcIdx < 4; ++SrcIdx) { in simplifyAMDGCNMemoryIntrinsicDemanded() local
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| D | InstCombineVectorOps.cpp | 411 int SrcIdx = SVI->getMaskValue(Elt->getZExtValue()); in visitExtractElementInst() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/AsmParser/ |
| D | AMDGPUAsmParser.cpp | 2913 for (int SrcIdx : SrcIndices) { in validateEarlyClobberLimitations() local
3270 for (int SrcIdx : SrcIndices) { in validateLdsDirect() local
4833 int SrcIdx = 0; in cvtExp() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLoweringHVX.cpp | 419 SmallVectorImpl<int> &SrcIdx) { in buildHvxVectorReg()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 2871 int SrcIdx = NarrowNumElts * I + J; in fewerElementsVectorBuildVector() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Utils/ |
| D | SimplifyCFG.cpp | 4063 for (unsigned SrcIdx = 0, SrcE = SrcPN->getNumIncomingValues(); in removeEmptyCleanup() local
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