| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | DetectDeadLanes.cpp | 242 unsigned SubIdx = MI.getOperand(OpNum + 1).getImm(); in transferUsedLanes() local
246 unsigned SubIdx = MI.getOperand(3).getImm(); in transferUsedLanes() local
266 unsigned SubIdx = MI.getOperand(2).getImm(); in transferUsedLanes() local
316 unsigned SubIdx = MI.getOperand(OpNum + 1).getImm(); in transferDefinedLanes() local
322 unsigned SubIdx = MI.getOperand(3).getImm(); in transferDefinedLanes() local
334 unsigned SubIdx = MI.getOperand(2).getImm(); in transferDefinedLanes() local
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| D | ExpandPostRAPseudos.cpp | 86 unsigned SubIdx = MI->getOperand(3).getImm(); in LowerSubregToReg() local
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| D | RegisterCoalescer.cpp | 1681 unsigned SubIdx) { in updateRegDefsUses()
2208 const unsigned SubIdx; member in __anon158514010311::JoinVals
2373 JoinVals(LiveRange &LR, unsigned Reg, unsigned SubIdx, LaneBitmask LaneMask, in JoinVals()
2865 bool JoinVals::usesLanes(const MachineInstr &MI, unsigned Reg, unsigned SubIdx, in usesLanes()
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| D | TargetRegisterInfo.cpp | 90 unsigned SubIdx, const MachineRegisterInfo *MRI) { in printReg()
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| D | TargetInstrInfo.cpp | 380 unsigned SubIdx, unsigned &Size, in getStackSlotRange()
411 unsigned DestReg, unsigned SubIdx, in reMaterialize()
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| D | TwoAddressInstructionPass.cpp | 1765 unsigned SubIdx = mi->getOperand(3).getImm(); in runOnMachineFunction() local
1819 unsigned SubIdx = MI.getOperand(i+1).getImm(); in eliminateRegSequence() local
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| D | MachineCopyPropagation.cpp | 343 unsigned SubIdx = TRI->getSubRegIndex(PreviousSrc, Src); in isNopCopy() local
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| D | MachineInstr.cpp | 907 if (unsigned SubIdx = MO.getSubReg()) { in getRegClassConstraintEffect() local
1140 unsigned SubIdx, in substituteRegister()
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| D | MachineOperand.cpp | 75 void MachineOperand::substVirtReg(Register Reg, unsigned SubIdx, in substVirtReg()
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| D | PeepholeOptimizer.cpp | 460 unsigned SrcReg, DstReg, SubIdx; in INITIALIZE_PASS_DEPENDENCY() local
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| D | SplitKit.cpp | 514 unsigned SubIdx, LiveInterval &DestLI, bool Late, SlotIndex Def) { in buildSingleSubRegCopy()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ThumbRegisterInfo.cpp | 64 unsigned SubIdx, int Val, in emitThumb1LoadConstPool()
84 unsigned SubIdx, int Val, in emitThumb2LoadConstPool()
105 const DebugLoc &dl, unsigned DestReg, unsigned SubIdx, int Val, in emitLoadConstPool()
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| D | ARMBaseRegisterInfo.cpp | 460 const DebugLoc &dl, unsigned DestReg, unsigned SubIdx, int Val, in emitLoadConstPool()
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| D | ARMBaseInstrInfo.cpp | 1014 unsigned SubIdx, unsigned State, in AddDReg()
1691 unsigned DestReg, unsigned SubIdx, in reMaterialize()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MC/ |
| D | MCRegisterInfo.cpp | 24 MCRegisterInfo::getMatchingSuperReg(MCRegister Reg, unsigned SubIdx, in getMatchingSuperReg()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 449 unsigned InstrEmitter::ConstrainForSubReg(unsigned VReg, unsigned SubIdx, in ConstrainForSubReg()
498 unsigned SubIdx = cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue(); in EmitSubregNode() local
553 unsigned SubIdx = cast<ConstantSDNode>(N2)->getZExtValue(); in EmitSubregNode() local
652 unsigned SubIdx = cast<ConstantSDNode>(Op)->getZExtValue(); in EmitRegSequence() local
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| D | TargetLowering.cpp | 934 unsigned SubIdx = Idx.getZExtValue(); in SimplifyDemandedBits() local
963 ConstantSDNode *SubIdx = dyn_cast<ConstantSDNode>(Op.getOperand(1)); in SimplifyDemandedBits() local
2335 unsigned SubIdx = Idx.getZExtValue(); in SimplifyDemandedVectorElts() local
2361 ConstantSDNode *SubIdx = dyn_cast<ConstantSDNode>(Op.getOperand(1)); in SimplifyDemandedVectorElts() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 338 const char *getSubRegIndexName(unsigned SubIdx) const { in getSubRegIndexName()
348 LaneBitmask getSubRegIndexLaneMask(unsigned SubIdx) const { in getSubRegIndexLaneMask()
516 unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx, in getMatchingSuperReg()
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| D | TargetInstrInfo.h | 239 unsigned &DstReg, unsigned &SubIdx) const { in isCoalescableExtInstr()
469 unsigned SubIdx; member
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstructionSelector.cpp | 204 unsigned SubIdx = X86::NoSubRegister; in getSubRegIndex() local
742 unsigned SubIdx; in selectTruncOrPtrToInt() local
1201 unsigned SubIdx = X86::NoSubRegister; in emitExtractSubreg() local
1239 unsigned SubIdx = X86::NoSubRegister; in emitInsertSubreg() local
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| D | X86InstrInfo.cpp | 642 unsigned DestReg, unsigned SubIdx, in reMaterialize()
4019 unsigned SubIdx) { in expandNOVLXLoad()
4042 unsigned SubIdx) { in expandNOVLXStore()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLoweringHVX.cpp | 314 SDValue SubIdx = DAG.getNode(ISD::AND, dl, MVT::i32, {Idx, Mask}); in getIndexInWord32() local
681 SDValue SubIdx = getIndexInWord32(IdxV, ElemTy, DAG); in extractHvxElementReg() local
742 SDValue SubIdx = getIndexInWord32(IdxV, ElemTy, DAG); in insertHvxElementReg() local
780 unsigned SubIdx; in extractHvxSubvectorReg() local
903 unsigned SubIdx = (Idx == 0) ? Hexagon::vsub_lo : Hexagon::vsub_hi; in insertHvxSubvectorReg() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 777 unsigned SubIdx = N ? Mips::sub_hi : Mips::sub_lo; in expandExtractElementF64() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 715 unsigned SubIdx; in copyPhysReg() local
2247 unsigned SubIdx = SubIndices[Idx]; in insertSelect() local
3865 unsigned SubIdx, in buildExtractSubReg()
3898 unsigned SubIdx, in buildExtractSubRegOrImm()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 816 unsigned SubIdx = 0; in insertSelect() local
1694 unsigned SubIdx = UseMI->getOperand(3).getSubReg(); in optimizeCompareInstr() local
|