| /third_party/vixl/benchmarks/aarch32/ |
| D | asm-disasm-speed-test.cc | 407 __ adds(Narrow, r4, r4, 24U); in Generate_2() local
417 __ adds(Narrow, r4, r4, 24U); in Generate_2() local
497 __ adds(r1, r4, 44U); in Generate_3() local
540 __ adds(r0, 4U); in Generate_3() local
541 __ adds(Narrow, r1, r1, 32U); in Generate_3() local
672 __ adds(r0, 4U); in Generate_4() local
673 __ adds(Narrow, r1, r1, 32U); in Generate_4() local
793 __ adds(r0, 4U); in Generate_5() local
794 __ adds(Narrow, r1, r1, 32U); in Generate_5() local
944 __ adds(r0, 4U); in Generate_7() local
[all …]
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| /third_party/mesa3d/src/intel/compiler/ |
| D | brw_fs_bank_conflicts.cpp | 118 adds(const vector_type &v, const vector_type &w) in adds() function
224 adds(vector_type v, vector_type w) in adds() function
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| /third_party/mesa3d/src/nouveau/codegen/ |
| D | nv50_ir_peephole.cpp | 1515 int adds; in opnd() local
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| /third_party/vixl/test/aarch64/ |
| D | test-assembler-aarch64.cc | 7405 __ adds(xzr, x0, Operand(x1, UXTX)); in TEST() local
7406 __ adds(xzr, x1, Operand(xzr, UXTX)); in TEST() local
7407 __ adds(xzr, x1, 1234); in TEST() local
7408 __ adds(xzr, x0, x1); in TEST() local
7409 __ adds(xzr, x1, xzr); in TEST() local
7410 __ adds(xzr, xzr, x1); in TEST() local
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| D | test-trace-aarch64.cc | 63 __ adds(w21, w22, w23); in GenerateTestSequenceBase() local
64 __ adds(x24, x25, x26); in GenerateTestSequenceBase() local
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| /third_party/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 1948 void adds(Register rd, Register rn, const Operand& operand) { in adds() function
1951 void adds(Condition cond, Register rd, Register rn, const Operand& operand) { in adds() function
1954 void adds(EncodingSize size, in adds() function
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| D | assembler-aarch32.cc | 2348 void Assembler::adds(Condition cond, in adds() function in vixl::aarch32::Assembler
2485 void Assembler::adds(Register rd, const Operand& operand) { in adds() function in vixl::aarch32::Assembler
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| D | disasm-aarch32.cc | 1175 void Disassembler::adds(Condition cond, in adds() function in vixl::aarch32::Disassembler
1189 void Disassembler::adds(Register rd, const Operand& operand) { in adds() function in vixl::aarch32::Disassembler
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| D | assembler-arm64.cc | 843 void Assembler::adds(const Register& rd, const Register& rn, in adds() function in v8::internal::Assembler
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| /third_party/vixl/src/aarch64/ |
| D | assembler-aarch64.cc | 476 void Assembler::adds(const Register& rd, in adds() function in vixl::aarch64::Assembler
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