| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 175 BPFTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, in getRegForInlineAsmConstraint() function in BPFTargetLowering
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 491 WebAssemblyTargetLowering::getRegForInlineAsmConstraint( in getRegForInlineAsmConstraint() function in WebAssemblyTargetLowering
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 395 MSP430TargetLowering::getRegForInlineAsmConstraint( in getRegForInlineAsmConstraint() function in MSP430TargetLowering
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.cpp | 236 LanaiTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, in getRegForInlineAsmConstraint() function in LanaiTargetLowering
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 1851 AVRTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, in getRegForInlineAsmConstraint() function in llvm::AVRTargetLowering
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 1928 XCoreTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, in getRegForInlineAsmConstraint() function in XCoreTargetLowering
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 4276 NVPTXTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, in getRegForInlineAsmConstraint() function in NVPTXTargetLowering
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVISelLowering.cpp | 2563 RISCVTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, in getRegForInlineAsmConstraint() function in RISCVTargetLowering
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 3255 SparcTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, in getRegForInlineAsmConstraint() function in SparcTargetLowering
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 3054 HexagonTargetLowering::getRegForInlineAsmConstraint( in getRegForInlineAsmConstraint() function in HexagonTargetLowering
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 4080 MipsTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, in getRegForInlineAsmConstraint() function in MipsTargetLowering
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 1101 SystemZTargetLowering::getRegForInlineAsmConstraint( in getRegForInlineAsmConstraint() function in SystemZTargetLowering
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 4183 TargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *RI, in getRegForInlineAsmConstraint() function in TargetLowering
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 10590 SITargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, in getRegForInlineAsmConstraint() function in SITargetLowering
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 14623 PPCTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, in getRegForInlineAsmConstraint() function in PPCTargetLowering
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 6260 AArch64TargetLowering::getRegForInlineAsmConstraint( in getRegForInlineAsmConstraint() function in AArch64TargetLowering
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 15947 RCPair ARMTargetLowering::getRegForInlineAsmConstraint( in getRegForInlineAsmConstraint() function in ARMTargetLowering
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 46849 X86TargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, in getRegForInlineAsmConstraint() function in X86TargetLowering
|