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Searched defs:imm8 (Results 1 – 25 of 35) sorted by relevance

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/third_party/node/deps/v8/src/codegen/x64/
Dassembler-x64.h1325 #define SSE_CMP_P(instr, imm8) \ argument
1610 void vshufps(XMMRegister dst, XMMRegister src1, XMMRegister src2, byte imm8) { in vshufps()
1613 void vshufps(YMMRegister dst, YMMRegister src1, YMMRegister src2, byte imm8) { in vshufps()
1682 #define AVX_CMP_P(instr, imm8, SIMDRegister) \ argument
1719 byte imm8) { in vinsertps()
1723 void vinsertps(XMMRegister dst, XMMRegister src1, Operand src2, byte imm8) { in vinsertps()
1727 void vpextrq(Register dst, XMMRegister src, int8_t imm8) { in vpextrq()
1732 void vpinsrb(XMMRegister dst, XMMRegister src1, Register src2, uint8_t imm8) { in vpinsrb()
1737 void vpinsrb(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t imm8) { in vpinsrb()
1741 void vpinsrw(XMMRegister dst, XMMRegister src1, Register src2, uint8_t imm8) { in vpinsrw()
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Dassembler-x64.cc883 void Assembler::btsq(Register dst, Immediate imm8) { in btsq()
892 void Assembler::btrq(Register dst, Immediate imm8) { in btrq()
1132 void Assembler::cmpb_al(Immediate imm8) { in cmpb_al()
2843 void Assembler::pinsrw(XMMRegister dst, Register src, uint8_t imm8) { in pinsrw()
2853 void Assembler::pinsrw(XMMRegister dst, Operand src, uint8_t imm8) { in pinsrw()
2863 void Assembler::pextrq(Register dst, XMMRegister src, int8_t imm8) { in pextrq()
2875 void Assembler::pinsrq(XMMRegister dst, Register src, uint8_t imm8) { in pinsrq()
2887 void Assembler::pinsrq(XMMRegister dst, Operand src, uint8_t imm8) { in pinsrq()
2899 void Assembler::pinsrd(XMMRegister dst, Register src, uint8_t imm8) { in pinsrd()
2903 void Assembler::pinsrd(XMMRegister dst, Operand src, uint8_t imm8) { in pinsrd()
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Dmacro-assembler-x64.cc892 void TurboAssembler::Pextrq(Register dst, XMMRegister src, int8_t imm8) { in CallRecordWriteStub()
2069 uint8_t imm8) { in CallRecordWriteStub()
2082 uint8_t imm8, uint32_t* load_pc_offset) { in CallRecordWriteStub()
2094 void TurboAssembler::PinsrdPreSse41(XMMRegister dst, Register src, uint8_t imm8, in CallRecordWriteStub()
2099 void TurboAssembler::PinsrdPreSse41(XMMRegister dst, Operand src, uint8_t imm8, in CallRecordWriteStub()
2105 uint8_t imm8, uint32_t* load_pc_offset) { in CallRecordWriteStub()
2111 uint8_t imm8, uint32_t* load_pc_offset) { in CallRecordWriteStub()
/third_party/vixl/src/aarch32/
Dinstructions-aarch32.cc629 uint32_t imm8 = imm >> (24 - shift); in ImmediateT32() local
686 uint32_t imm8 = (imm << rot) | (imm >> (32 - rot)); in ImmediateA32() local
Doperands-aarch32.h540 static float Decode(uint32_t imm8, const FloatType<float>&) { in Decode()
544 static double Decode(uint32_t imm8, const FloatType<double>&) { in Decode()
Dmacro-assembler-aarch32.cc1282 uint8_t imm8 = imm & 0xff; in IsI8BitPattern() local
/third_party/node/deps/v8/src/codegen/ia32/
Dassembler-ia32.cc903 void Assembler::cmpb(Operand op, Immediate imm8) { in cmpb()
1137 void Assembler::rcl(Register dst, uint8_t imm8) { in rcl()
1150 void Assembler::rcr(Register dst, uint8_t imm8) { in rcr()
1163 void Assembler::rol(Operand dst, uint8_t imm8) { in rol()
1182 void Assembler::ror(Operand dst, uint8_t imm8) { in ror()
1201 void Assembler::sar(Operand dst, uint8_t imm8) { in sar()
1242 void Assembler::shl(Operand dst, uint8_t imm8) { in shl()
1261 void Assembler::shr(Operand dst, uint8_t imm8) { in shr()
1366 void Assembler::test_b(Register reg, Immediate imm8) { in test_b()
1384 void Assembler::test_b(Operand op, Immediate imm8) { in test_b()
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Dassembler-ia32.h494 void mov_b(Register dst, int8_t imm8) { mov_b(Operand(dst), imm8); } in mov_b()
586 void cmpb(Register reg, Immediate imm8) { in cmpb()
654 void rol(Register dst, uint8_t imm8) { rol(Operand(dst), imm8); } in rol()
659 void ror(Register dst, uint8_t imm8) { ror(Operand(dst), imm8); } in ror()
664 void sar(Register dst, uint8_t imm8) { sar(Operand(dst), imm8); } in sar()
672 void shl(Register dst, uint8_t imm8) { shl(Operand(dst), imm8); } in shl()
679 void shr(Register dst, uint8_t imm8) { shr(Operand(dst), imm8); } in shr()
913 #define SSE_CMP_P(instr, imm8) \ argument
1162 void vshufps(XMMRegister dst, XMMRegister src1, XMMRegister src2, byte imm8) { in vshufps()
1166 void vshufpd(XMMRegister dst, XMMRegister src1, XMMRegister src2, byte imm8) { in vshufpd()
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Dmacro-assembler-ia32.h308 void PinsrdPreSse41(XMMRegister dst, Register src, uint8_t imm8, in PinsrdPreSse41()
Dmacro-assembler-ia32.cc1601 uint8_t imm8) { in CallRecordWriteStub()
1616 void TurboAssembler::PinsrdPreSse41(XMMRegister dst, Operand src, uint8_t imm8, in CallRecordWriteStub()
/third_party/vixl/src/aarch64/
Dinstructions-aarch64.cc771 Float16 Instruction::Imm8ToFloat16(uint32_t imm8) { in Imm8ToFloat16()
784 float Instruction::Imm8ToFP32(uint32_t imm8) { in Imm8ToFP32()
804 double Instruction::Imm8ToFP64(uint32_t imm8) { in Imm8ToFP64()
Dassembler-sve-aarch64.cc32 void Assembler::ResolveSVEImm8Shift(int* imm8, int* shift) { in ResolveSVEImm8Shift()
3560 int imm8, in cpy()
3594 int imm8, in SVEIntAddSubtractImmUnpredicatedHelper()
3616 int imm8, in add()
3630 void Assembler::dup(const ZRegister& zd, int imm8, int shift) { in dup()
3656 void Assembler::mul(const ZRegister& zd, const ZRegister& zn, int imm8) { in mul()
3669 void Assembler::smax(const ZRegister& zd, const ZRegister& zn, int imm8) { in smax()
3682 void Assembler::smin(const ZRegister& zd, const ZRegister& zn, int imm8) { in smin()
3697 int imm8, in sqadd()
3713 int imm8, in sqsub()
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Dmacro-assembler-sve-aarch64.cc75 int imm8; in TrySingleAddSub() local
368 int imm8; in Cpy() local
482 int imm8; in Dup() local
1093 int imm8; in Sub() local
Dassembler-aarch64.cc3974 void Assembler::orr(const VRegister& vd, const int imm8, const int left_shift) { in orr()
3992 void Assembler::bic(const VRegister& vd, const int imm8, const int left_shift) { in bic()
4006 int imm8 = 0; in movi() local
4046 const int imm8, in mvni()
5604 const int imm8, in NEONModifiedImmShiftLsl()
5637 const int imm8, in NEONModifiedImmShiftMsl()
Dassembler-aarch64.h7595 static Instr ImmNEONabcdefgh(int imm8) { in ImmNEONabcdefgh()
/third_party/node/deps/v8/src/diagnostics/ia32/
Ddisasm-ia32.cc589 int imm8 = -1; in D1D3C1Instruction() local
1992 int8_t imm8 = static_cast<int8_t>(data[1]); in InstructionDecode() local
2015 int8_t imm8 = static_cast<int8_t>(data[1]); in InstructionDecode() local
2275 int8_t imm8 = static_cast<int8_t>(data[1]); in InstructionDecode() local
2324 int8_t imm8 = static_cast<int8_t>(data[1]); in InstructionDecode() local
2427 int8_t imm8 = static_cast<int8_t>(data[1]); in InstructionDecode() local
2435 int8_t imm8 = static_cast<int8_t>(data[1]); in InstructionDecode() local
2443 int8_t imm8 = static_cast<int8_t>(data[1]); in InstructionDecode() local
/third_party/node/deps/v8/src/codegen/arm64/
Dinstructions-arm64.h180 static float Imm8ToFP32(uint32_t imm8) { in Imm8ToFP32()
193 static double Imm8ToFP64(uint32_t imm8) { in Imm8ToFP64()
Dassembler-arm64.h2345 static Instr ImmNEONabcdefgh(int imm8) { in ImmNEONabcdefgh()
Dassembler-arm64.cc3194 void Assembler::orr(const VRegister& vd, const int imm8, const int left_shift) { in orr()
3208 void Assembler::bic(const VRegister& vd, const int imm8, const int left_shift) { in bic()
3217 int imm8 = 0; in movi() local
3249 void Assembler::mvni(const VRegister& vd, const int imm8, Shift shift, in mvni()
3820 void Assembler::NEONModifiedImmShiftLsl(const VRegister& vd, const int imm8, in NEONModifiedImmShiftLsl()
3851 void Assembler::NEONModifiedImmShiftMsl(const VRegister& vd, const int imm8, in NEONModifiedImmShiftMsl()
/third_party/node/deps/v8/src/codegen/shared-ia32-x64/
Dmacro-assembler-shared-ia32-x64.h563 void Pextrd(Register dst, XMMRegister src, uint8_t imm8) { in Pextrd()
Dmacro-assembler-shared-ia32-x64.cc120 XMMRegister src2, uint8_t imm8) { in Shufps()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/Disassembler/
DX86Disassembler.cpp1394 uint8_t imm8; in readImmediate() local
/third_party/node/deps/v8/src/diagnostics/arm64/
Ddisasm-arm64.cc4016 uint64_t imm8 = instr->ImmNEONabcdefgh(); in SubstituteImmediateField() local
4020 uint64_t imm8 = instr->ImmNEONabcdefgh(); in SubstituteImmediateField() local
/third_party/node/deps/v8/src/codegen/riscv64/
Dconstants-riscv64.h1739 int32_t imm8 = in RvcImm6LwspValue() local
1759 int32_t imm8 = ((Bits & 0x1e00) >> 7) | ((Bits & 0x180) >> 1); in RvcImm6SwspValue() local
1787 int32_t imm8 = ((Bits & 0x1c00) >> 7) | ((Bits & 0x60) << 1); in RvcImm5DValue() local
/third_party/node/deps/v8/src/diagnostics/x64/
Ddisasm-x64.cc832 int imm8 = -1; in ShiftInstruction() local

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