| /third_party/node/deps/v8/src/interpreter/ |
| D | bytecode-register.cc | 106 Register reg4, Register reg5) { in AreContiguous()
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| /third_party/ffmpeg/libavcodec/loongarch/ |
| D | vp9_idct_lsx.c | 376 __m128i reg0, reg2, reg4, reg6, reg8, reg10, reg12, reg14; in vp9_idct16_1d_columns_addblk_lsx() local
502 __m128i reg0, reg2, reg4, reg6, reg8, reg10, reg12, reg14; in vp9_idct16_1d_columns_lsx() local
883 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in vp9_idct8x32_column_even_process_store() local
998 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in vp9_idct8x32_column_odd_process_store() local
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| D | vp9_mc_lsx.c | 457 __m128i reg0, reg1, reg2, reg3, reg4; in common_vt_8t_4w_lsx() local
517 __m128i reg0, reg1, reg2, reg3, reg4, reg5; in common_vt_8t_8w_lsx() local
589 __m128i reg0, reg1, reg2, reg3, reg4, reg5; in common_vt_8t_16w_lsx() local
683 __m128i reg0, reg1, reg2, reg3, reg4, reg5; in common_vt_8t_16w_mult_lsx() local
1543 __m128i reg0, reg1, reg2, reg3, reg4; in common_vt_8t_and_aver_dst_4w_lsx() local
1619 __m128i reg0, reg1, reg2, reg3, reg4, reg5; in common_vt_8t_and_aver_dst_8w_lsx() local
1705 __m128i reg0, reg1, reg2, reg3, reg4, reg5; in common_vt_8t_and_aver_dst_16w_mult_lsx() local
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| /third_party/vixl/src/aarch64/ |
| D | macro-assembler-aarch64.cc | 3038 const Register& reg4) { in Emit()
3052 const VRegister& reg4) { in Emit()
3062 const CPURegister& reg4) { in Emit()
3102 const Register& reg4) { in Emit()
3112 const VRegister& reg4) { in Emit()
3122 const CPURegister& reg4) { in Emit()
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| /third_party/ffmpeg/libavcodec/mips/ |
| D | vp9_idct_msa.c | 967 v8i16 reg0, reg2, reg4, reg6, reg8, reg10, reg12, reg14; in vp9_idct16_1d_columns_addblk_msa() local
1070 v8i16 reg0, reg2, reg4, reg6, reg8, reg10, reg12, reg14; in vp9_idct16_1d_columns_msa() local
1634 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in vp9_idct8x32_column_even_process_store() local
1718 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in vp9_idct8x32_column_odd_process_store() local
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| /third_party/mesa3d/src/gallium/drivers/r600/sfn/ |
| D | sfn_optimizer.cpp | 553 void SimplifySourceVecVisitor::replace_src(Instr *instr, RegisterVec4& reg4) in replace_src()
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| D | assembler-arm64.cc | 225 const CPURegister& reg3, const CPURegister& reg4, in AreAliased()
261 const CPURegister& reg3, const CPURegister& reg4, in AreSameSizeAndType()
277 const VRegister& reg3, const VRegister& reg4) { in AreSameFormat()
285 const VRegister& reg3, const VRegister& reg4) { in AreConsecutive()
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| /third_party/vixl/src/aarch32/ |
| D | macro-assembler-aarch32.cc | 454 CPURegister reg4) { in Printf()
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| D | instructions-aarch32.h | 559 VRegisterList(VRegister reg1, VRegister reg2, VRegister reg3, VRegister reg4) in VRegisterList()
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| /third_party/node/deps/v8/src/codegen/arm/ |
| D | macro-assembler-arm.cc | 2616 Register reg4, Register reg5, in CallRecordWriteStub()
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| /third_party/node/deps/v8/src/codegen/ppc/ |
| D | macro-assembler-ppc.cc | 3386 Register reg4, Register reg5, in CallRecordWriteStub()
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| /third_party/node/deps/v8/src/codegen/loong64/ |
| D | macro-assembler-loong64.cc | 4062 Register reg4, Register reg5, in CallRecordWriteStub()
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| /third_party/node/deps/v8/src/codegen/mips/ |
| D | macro-assembler-mips.cc | 5531 Register reg4, Register reg5, in CallRecordWriteStub()
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| /third_party/node/deps/v8/src/codegen/mips64/ |
| D | macro-assembler-mips64.cc | 6074 Register reg4, Register reg5, in CallRecordWriteStub()
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| /third_party/node/deps/v8/src/codegen/riscv64/ |
| D | macro-assembler-riscv64.cc | 4953 Register reg4, Register reg5, in GetRegisterThatIsNotOneOf()
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| /third_party/node/deps/v8/src/codegen/s390/ |
| D | macro-assembler-s390.cc | 2422 Register reg4, Register reg5, in CallRecordWriteStub()
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