1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3 * Driver for 8250/16550-type serial ports
4 *
5 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
6 *
7 * Copyright (C) 2001 Russell King.
8 */
9
10 #include <linux/serial_8250.h>
11 #include <linux/serial_reg.h>
12 #include <linux/dmaengine.h>
13
14 #include "../serial_mctrl_gpio.h"
15
16 struct uart_8250_dma {
17 int (*tx_dma)(struct uart_8250_port *p);
18 int (*rx_dma)(struct uart_8250_port *p);
19
20 /* Filter function */
21 dma_filter_fn fn;
22 /* Parameter to the filter function */
23 void *rx_param;
24 void *tx_param;
25
26 struct dma_slave_config rxconf;
27 struct dma_slave_config txconf;
28
29 struct dma_chan *rxchan;
30 struct dma_chan *txchan;
31
32 /* Device address base for DMA operations */
33 phys_addr_t rx_dma_addr;
34 phys_addr_t tx_dma_addr;
35
36 /* DMA address of the buffer in memory */
37 dma_addr_t rx_addr;
38 dma_addr_t tx_addr;
39
40 dma_cookie_t rx_cookie;
41 dma_cookie_t tx_cookie;
42
43 void *rx_buf;
44
45 size_t rx_size;
46 size_t tx_size;
47
48 unsigned char tx_running;
49 unsigned char tx_err;
50 unsigned char rx_running;
51 };
52
53 struct old_serial_port {
54 unsigned int uart;
55 unsigned int baud_base;
56 unsigned int port;
57 unsigned int irq;
58 upf_t flags;
59 unsigned char io_type;
60 unsigned char __iomem *iomem_base;
61 unsigned short iomem_reg_shift;
62 };
63
64 struct serial8250_config {
65 const char *name;
66 unsigned short fifo_size;
67 unsigned short tx_loadsz;
68 unsigned char fcr;
69 unsigned char rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
70 unsigned int flags;
71 };
72
73 #define UART_CAP_FIFO (1 << 8) /* UART has FIFO */
74 #define UART_CAP_EFR (1 << 9) /* UART has EFR */
75 #define UART_CAP_SLEEP (1 << 10) /* UART has IER sleep */
76 #define UART_CAP_AFE (1 << 11) /* MCR-based hw flow control */
77 #define UART_CAP_UUE (1 << 12) /* UART needs IER bit 6 set (Xscale) */
78 #define UART_CAP_RTOIE (1 << 13) /* UART needs IER bit 4 set (Xscale, Tegra) */
79 #define UART_CAP_HFIFO (1 << 14) /* UART has a "hidden" FIFO */
80 #define UART_CAP_RPM (1 << 15) /* Runtime PM is active while idle */
81 #define UART_CAP_IRDA (1 << 16) /* UART supports IrDA line discipline */
82 #define UART_CAP_MINI (1 << 17) /* Mini UART on BCM283X family lacks:
83 * STOP PARITY EPAR SPAR WLEN5 WLEN6
84 */
85
86 #define UART_BUG_QUOT (1 << 0) /* UART has buggy quot LSB */
87 #define UART_BUG_TXEN (1 << 1) /* UART has buggy TX IIR status */
88 #define UART_BUG_NOMSR (1 << 2) /* UART has buggy MSR status bits (Au1x00) */
89 #define UART_BUG_THRE (1 << 3) /* UART has buggy THRE reassertion */
90 #define UART_BUG_TXRACE (1 << 5) /* UART Tx fails to set remote DR */
91
92
93 #ifdef CONFIG_SERIAL_8250_SHARE_IRQ
94 #define SERIAL8250_SHARE_IRQS 1
95 #else
96 #define SERIAL8250_SHARE_IRQS 0
97 #endif
98
99 #define SERIAL8250_PORT_FLAGS(_base, _irq, _flags) \
100 { \
101 .iobase = _base, \
102 .irq = _irq, \
103 .uartclk = 1843200, \
104 .iotype = UPIO_PORT, \
105 .flags = UPF_BOOT_AUTOCONF | (_flags), \
106 }
107
108 #define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0)
109
110
serial_in(struct uart_8250_port * up,int offset)111 static inline int serial_in(struct uart_8250_port *up, int offset)
112 {
113 return up->port.serial_in(&up->port, offset);
114 }
115
serial_out(struct uart_8250_port * up,int offset,int value)116 static inline void serial_out(struct uart_8250_port *up, int offset, int value)
117 {
118 up->port.serial_out(&up->port, offset, value);
119 }
120
121 /*
122 * For the 16C950
123 */
serial_icr_write(struct uart_8250_port * up,int offset,int value)124 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
125 {
126 serial_out(up, UART_SCR, offset);
127 serial_out(up, UART_ICR, value);
128 }
129
serial_icr_read(struct uart_8250_port * up,int offset)130 static unsigned int __maybe_unused serial_icr_read(struct uart_8250_port *up,
131 int offset)
132 {
133 unsigned int value;
134
135 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
136 serial_out(up, UART_SCR, offset);
137 value = serial_in(up, UART_ICR);
138 serial_icr_write(up, UART_ACR, up->acr);
139
140 return value;
141 }
142
143 void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
144
serial_dl_read(struct uart_8250_port * up)145 static inline int serial_dl_read(struct uart_8250_port *up)
146 {
147 return up->dl_read(up);
148 }
149
serial_dl_write(struct uart_8250_port * up,int value)150 static inline void serial_dl_write(struct uart_8250_port *up, int value)
151 {
152 up->dl_write(up, value);
153 }
154
serial8250_set_THRI(struct uart_8250_port * up)155 static inline bool serial8250_set_THRI(struct uart_8250_port *up)
156 {
157 if (up->ier & UART_IER_THRI)
158 return false;
159 up->ier |= UART_IER_THRI;
160 serial_out(up, UART_IER, up->ier);
161 return true;
162 }
163
serial8250_clear_THRI(struct uart_8250_port * up)164 static inline bool serial8250_clear_THRI(struct uart_8250_port *up)
165 {
166 if (!(up->ier & UART_IER_THRI))
167 return false;
168 up->ier &= ~UART_IER_THRI;
169 serial_out(up, UART_IER, up->ier);
170 return true;
171 }
172
173 struct uart_8250_port *serial8250_get_port(int line);
174
175 void serial8250_rpm_get(struct uart_8250_port *p);
176 void serial8250_rpm_put(struct uart_8250_port *p);
177
178 void serial8250_rpm_get_tx(struct uart_8250_port *p);
179 void serial8250_rpm_put_tx(struct uart_8250_port *p);
180
181 int serial8250_em485_config(struct uart_port *port, struct serial_rs485 *rs485);
182 void serial8250_em485_start_tx(struct uart_8250_port *p);
183 void serial8250_em485_stop_tx(struct uart_8250_port *p);
184 void serial8250_em485_destroy(struct uart_8250_port *p);
185
186 /* MCR <-> TIOCM conversion */
serial8250_TIOCM_to_MCR(int tiocm)187 static inline int serial8250_TIOCM_to_MCR(int tiocm)
188 {
189 int mcr = 0;
190
191 if (tiocm & TIOCM_RTS)
192 mcr |= UART_MCR_RTS;
193 if (tiocm & TIOCM_DTR)
194 mcr |= UART_MCR_DTR;
195 if (tiocm & TIOCM_OUT1)
196 mcr |= UART_MCR_OUT1;
197 if (tiocm & TIOCM_OUT2)
198 mcr |= UART_MCR_OUT2;
199 if (tiocm & TIOCM_LOOP)
200 mcr |= UART_MCR_LOOP;
201
202 return mcr;
203 }
204
serial8250_MCR_to_TIOCM(int mcr)205 static inline int serial8250_MCR_to_TIOCM(int mcr)
206 {
207 int tiocm = 0;
208
209 if (mcr & UART_MCR_RTS)
210 tiocm |= TIOCM_RTS;
211 if (mcr & UART_MCR_DTR)
212 tiocm |= TIOCM_DTR;
213 if (mcr & UART_MCR_OUT1)
214 tiocm |= TIOCM_OUT1;
215 if (mcr & UART_MCR_OUT2)
216 tiocm |= TIOCM_OUT2;
217 if (mcr & UART_MCR_LOOP)
218 tiocm |= TIOCM_LOOP;
219
220 return tiocm;
221 }
222
223 /* MSR <-> TIOCM conversion */
serial8250_MSR_to_TIOCM(int msr)224 static inline int serial8250_MSR_to_TIOCM(int msr)
225 {
226 int tiocm = 0;
227
228 if (msr & UART_MSR_DCD)
229 tiocm |= TIOCM_CAR;
230 if (msr & UART_MSR_RI)
231 tiocm |= TIOCM_RNG;
232 if (msr & UART_MSR_DSR)
233 tiocm |= TIOCM_DSR;
234 if (msr & UART_MSR_CTS)
235 tiocm |= TIOCM_CTS;
236
237 return tiocm;
238 }
239
serial8250_out_MCR(struct uart_8250_port * up,int value)240 static inline void serial8250_out_MCR(struct uart_8250_port *up, int value)
241 {
242 serial_out(up, UART_MCR, value);
243
244 if (up->gpios)
245 mctrl_gpio_set(up->gpios, serial8250_MCR_to_TIOCM(value));
246 }
247
serial8250_in_MCR(struct uart_8250_port * up)248 static inline int serial8250_in_MCR(struct uart_8250_port *up)
249 {
250 int mctrl;
251
252 mctrl = serial_in(up, UART_MCR);
253
254 if (up->gpios) {
255 unsigned int mctrl_gpio = 0;
256
257 mctrl_gpio = mctrl_gpio_get_outputs(up->gpios, &mctrl_gpio);
258 mctrl |= serial8250_TIOCM_to_MCR(mctrl_gpio);
259 }
260
261 return mctrl;
262 }
263
264 #if defined(__alpha__) && !defined(CONFIG_PCI)
265 /*
266 * Digital did something really horribly wrong with the OUT1 and OUT2
267 * lines on at least some ALPHA's. The failure mode is that if either
268 * is cleared, the machine locks up with endless interrupts.
269 */
270 #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1)
271 #else
272 #define ALPHA_KLUDGE_MCR 0
273 #endif
274
275 #ifdef CONFIG_SERIAL_8250_PNP
276 int serial8250_pnp_init(void);
277 void serial8250_pnp_exit(void);
278 #else
serial8250_pnp_init(void)279 static inline int serial8250_pnp_init(void) { return 0; }
serial8250_pnp_exit(void)280 static inline void serial8250_pnp_exit(void) { }
281 #endif
282
283 #ifdef CONFIG_SERIAL_8250_FINTEK
284 int fintek_8250_probe(struct uart_8250_port *uart);
285 #else
fintek_8250_probe(struct uart_8250_port * uart)286 static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; }
287 #endif
288
289 #ifdef CONFIG_ARCH_OMAP1
is_omap1_8250(struct uart_8250_port * pt)290 static inline int is_omap1_8250(struct uart_8250_port *pt)
291 {
292 int res;
293
294 switch (pt->port.mapbase) {
295 case OMAP1_UART1_BASE:
296 case OMAP1_UART2_BASE:
297 case OMAP1_UART3_BASE:
298 res = 1;
299 break;
300 default:
301 res = 0;
302 break;
303 }
304
305 return res;
306 }
307
is_omap1510_8250(struct uart_8250_port * pt)308 static inline int is_omap1510_8250(struct uart_8250_port *pt)
309 {
310 if (!cpu_is_omap1510())
311 return 0;
312
313 return is_omap1_8250(pt);
314 }
315 #else
is_omap1_8250(struct uart_8250_port * pt)316 static inline int is_omap1_8250(struct uart_8250_port *pt)
317 {
318 return 0;
319 }
is_omap1510_8250(struct uart_8250_port * pt)320 static inline int is_omap1510_8250(struct uart_8250_port *pt)
321 {
322 return 0;
323 }
324 #endif
325
326 #ifdef CONFIG_SERIAL_8250_DMA
327 extern int serial8250_tx_dma(struct uart_8250_port *);
328 extern int serial8250_rx_dma(struct uart_8250_port *);
329 extern void serial8250_rx_dma_flush(struct uart_8250_port *);
330 extern int serial8250_request_dma(struct uart_8250_port *);
331 extern void serial8250_release_dma(struct uart_8250_port *);
332
serial8250_tx_dma_running(struct uart_8250_port * p)333 static inline bool serial8250_tx_dma_running(struct uart_8250_port *p)
334 {
335 struct uart_8250_dma *dma = p->dma;
336
337 return dma && dma->tx_running;
338 }
339 #else
serial8250_tx_dma(struct uart_8250_port * p)340 static inline int serial8250_tx_dma(struct uart_8250_port *p)
341 {
342 return -1;
343 }
serial8250_rx_dma(struct uart_8250_port * p)344 static inline int serial8250_rx_dma(struct uart_8250_port *p)
345 {
346 return -1;
347 }
serial8250_rx_dma_flush(struct uart_8250_port * p)348 static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { }
serial8250_request_dma(struct uart_8250_port * p)349 static inline int serial8250_request_dma(struct uart_8250_port *p)
350 {
351 return -1;
352 }
serial8250_release_dma(struct uart_8250_port * p)353 static inline void serial8250_release_dma(struct uart_8250_port *p) { }
354
serial8250_tx_dma_running(struct uart_8250_port * p)355 static inline bool serial8250_tx_dma_running(struct uart_8250_port *p)
356 {
357 return false;
358 }
359 #endif
360
ns16550a_goto_highspeed(struct uart_8250_port * up)361 static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
362 {
363 unsigned char status;
364
365 status = serial_in(up, 0x04); /* EXCR2 */
366 #define PRESL(x) ((x) & 0x30)
367 if (PRESL(status) == 0x10) {
368 /* already in high speed mode */
369 return 0;
370 } else {
371 status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
372 status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
373 serial_out(up, 0x04, status);
374 }
375 return 1;
376 }
377
serial_index(struct uart_port * port)378 static inline int serial_index(struct uart_port *port)
379 {
380 return port->minor - 64;
381 }
382