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Searched defs:write_mask (Results 1 – 25 of 65) sorted by relevance

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/third_party/mesa3d/src/compiler/glsl/
Dopt_copy_propagation_elements.cpp95 void erase(ir_variable *var, unsigned write_mask) in erase()
137 void write_elements(ir_variable *lhs, ir_variable *rhs, unsigned write_mask, int swizzle[4]) in write_elements()
263 kill_entry(ir_variable *var, int write_mask) in kill_entry()
270 unsigned int write_mask; member in __anonb4ff065a0111::kill_entry
715 int write_mask = ir->write_mask; in add_copy() local
Dopt_constant_propagation.cpp53 acp_entry(ir_variable *var, unsigned write_mask, ir_constant *constant) in acp_entry()
73 unsigned write_mask; member in __anonab65520d0111::acp_entry
450 ir_constant_propagation_visitor::kill(ir_variable *var, unsigned write_mask) in kill()
Dglsl_to_nir.cpp1485 ir_constant *write_mask = ((ir_instruction *)param)->as_constant(); in visit() local
1533 ir_constant *write_mask = ((ir_instruction *)param)->as_constant(); in visit() local
1726 unsigned write_mask = ir->write_mask; in visit() local
Dast_function.cpp1559 const unsigned write_mask = ((1U << rhs_components) - 1) in emit_inline_vector_constructor() local
1618 const unsigned write_mask = ((1U << count) - 1) << row_base; in assign_to_matrix_column() local
1812 const unsigned write_mask = (1U << last_row) - 1; in emit_inline_matrix_constructor() local
/third_party/mesa3d/src/gallium/drivers/r600/sfn/
Dsfn_shader_gs.cpp86 auto write_mask = nir_intrinsic_write_mask(instr); in process_store_output() local
101 auto write_mask = nir_intrinsic_write_mask(instr); in process_store_output() local
256 uint32_t write_mask = nir_intrinsic_write_mask(instr); in store_output() local
Dsfn_shader_vs.cpp195 uint32_t write_mask = 0; in emit_varying_pos() local
267 int write_mask = nir_intrinsic_write_mask(&intr) << store_info.frac; in emit_varying_param() local
429 auto write_mask = nir_intrinsic_write_mask(intr); in do_scan_instruction() local
Dsfn_shader_tess.cpp207 auto write_mask = nir_intrinsic_write_mask(intr); in do_scan_instruction() local
Dsfn_instr_export.h107 int write_mask() const { return m_writemask;} in write_mask() function
/third_party/mesa3d/src/compiler/nir/
Dnir_opt_shrink_stores.c83 unsigned write_mask = nir_intrinsic_write_mask(instr); in opt_shrink_store_instr() local
Dnir_opt_copy_prop_vars.c111 nir_component_mask_t write_mask = nir_intrinsic_write_mask(intrin); in value_equals_store_src() local
376 unsigned write_mask) in lookup_entry_and_kill_aliases()
423 unsigned write_mask) in kill_aliases()
437 unsigned write_mask) in get_entry_and_kill_aliases()
463 unsigned base_index, unsigned write_mask) in value_set_from_value()
Dnir_opt_undef.c155 unsigned write_mask = nir_intrinsic_write_mask(intrin); in opt_undef_store() local
Dnir_lower_vec_to_movs.c193 unsigned write_mask = 0; in try_coalesce() local
Dnir_lower_regs_to_ssa.c119 unsigned write_mask = alu->dest.write_mask; in rewrite_alu_instr() local
Dnir_lower_io.c445 nir_component_mask_t write_mask, nir_alu_type src_type) in emit_store()
517 nir_component_mask_t write_mask = nir_intrinsic_write_mask(intrin); in lower_store() local
1579 nir_ssa_def *value, nir_component_mask_t write_mask) in build_explicit_io_store()
1962 nir_component_mask_t write_mask = nir_intrinsic_write_mask(intrin); in nir_lower_explicit_io_instr() local
1997 const nir_component_mask_t write_mask = 0; in nir_lower_explicit_io_instr() local
Dnir_opt_combine_stores.c55 nir_component_mask_t write_mask; member
/third_party/mesa3d/src/gallium/drivers/freedreno/a2xx/
Dir2_cp.c143 unsigned write_mask = 0; in cp_export() local
Dir2_assemble.c106 unsigned write_mask = 0; in alu_write_mask() local
/third_party/mesa3d/src/gallium/drivers/i915/
Di915_fpc_optimize.c152 is_unswizzled(struct i915_full_src_register *r, unsigned write_mask) in is_unswizzled()
188 unsigned write_mask, unsigned neutral) in set_neutral_element_swizzle()
/third_party/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_util.c113 uint8_t write_mask, in tgsi_util_get_src_usage_mask()
/third_party/mesa3d/src/broadcom/vulkan/
Dv3dvx_pipeline.c281 const uint8_t write_mask = in pack_single_stencil_cfg() local
/third_party/mesa3d/src/gallium/drivers/r600/
Dr600_shader.c3120 unsigned write_mask = dst->Register.WriteMask; in r600_store_tcs_output() local
4527 unsigned write_mask = inst->Dst[0].Register.WriteMask; in tgsi_op2_64_params() local
4654 unsigned write_mask = inst->Dst[0].Register.WriteMask; in tgsi_op2_64() local
4711 unsigned write_mask = inst->Dst[0].Register.WriteMask; in tgsi_op2_s() local
4861 unsigned write_mask = inst->Dst[0].Register.WriteMask; in tgsi_dfracexp() local
4926 int write_mask = inst->Dst[0].Register.WriteMask; in egcm_int_to_double() local
5849 unsigned write_mask = inst->Dst[0].Register.WriteMask; in tgsi_divmod() local
6636 unsigned write_mask = inst->Dst[0].Register.WriteMask; in tgsi_f2i() local
6685 unsigned write_mask = inst->Dst[0].Register.WriteMask; in tgsi_iabs() local
6741 unsigned write_mask = inst->Dst[0].Register.WriteMask; in tgsi_issg() local
[all …]
/third_party/mesa3d/src/amd/common/
Dac_nir_lower_tess_io_to_mem.c256 unsigned write_mask = nir_intrinsic_write_mask(intrin); in lower_ls_output_store() local
431 unsigned write_mask = nir_intrinsic_write_mask(intrin); in lower_hs_output_store() local
/third_party/mesa3d/src/gallium/drivers/etnaviv/
Detnaviv_asm.h62 unsigned write_mask:4; /* INST_COMPS_* */ member
Detnaviv_compiler_nir.h104 unsigned swizzle = 0, write_mask = 0; in update_swiz_mask() local
/third_party/mesa3d/src/gallium/auxiliary/nir/
Dnir_to_tgsi.c238 ntt_64bit_write_mask(unsigned write_mask) in ntt_64bit_write_mask()
726 unsigned write_mask; in ntt_output_decl() local
1074 uint32_t write_mask = BITFIELD_MASK(nir_reg->num_components); in ntt_setup_registers() local
1210 ntt_swizzle_for_write_mask(struct ureg_src src, uint32_t write_mask) in ntt_swizzle_for_write_mask()
2023 unsigned write_mask = nir_intrinsic_write_mask(instr); in ntt_emit_mem() local
2332 uint32_t write_mask = BITSET_MASK(nir_dest_num_components(instr->dest)); in ntt_emit_load_sysval() local

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