1 /*
2 * Copyright 2014, 2015 Red Hat.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23 #ifndef VIRGL_WINSYS_H
24 #define VIRGL_WINSYS_H
25
26 #include "pipe/p_defines.h"
27 #include "virtio-gpu/virgl_hw.h"
28
29 struct pipe_box;
30 struct pipe_fence_handle;
31 struct winsys_handle;
32 struct virgl_hw_res;
33
34 #define VIRGL_MAX_TBUF_DWORDS 1024
35 #define VIRGL_MAX_CMDBUF_DWORDS ((64 * 1024) + VIRGL_MAX_TBUF_DWORDS)
36 #define VIRGL_MAX_PLANE_COUNT 3
37
38 struct virgl_drm_caps {
39 union virgl_caps caps;
40 };
41
42 struct virgl_cmd_buf {
43 unsigned cdw;
44 uint32_t *buf;
45 };
46
47 struct virgl_winsys {
48 unsigned pci_id;
49 int supports_fences; /* In/Out fences are supported */
50 int supports_encoded_transfers; /* Encoded transfers are supported */
51 int supports_coherent; /* Coherent memory is supported */
52
53 void (*destroy)(struct virgl_winsys *vws);
54
55 int (*transfer_put)(struct virgl_winsys *vws,
56 struct virgl_hw_res *res,
57 const struct pipe_box *box,
58 uint32_t stride, uint32_t layer_stride,
59 uint32_t buf_offset, uint32_t level);
60
61 int (*transfer_get)(struct virgl_winsys *vws,
62 struct virgl_hw_res *res,
63 const struct pipe_box *box,
64 uint32_t stride, uint32_t layer_stride,
65 uint32_t buf_offset, uint32_t level);
66
67 struct virgl_hw_res *(*resource_create)(struct virgl_winsys *vws,
68 enum pipe_texture_target target,
69 const void *map_front_private,
70 uint32_t format, uint32_t bind,
71 uint32_t width, uint32_t height,
72 uint32_t depth, uint32_t array_size,
73 uint32_t last_level, uint32_t nr_samples,
74 uint32_t flags, uint32_t size);
75
76 void (*resource_reference)(struct virgl_winsys *qws,
77 struct virgl_hw_res **dres,
78 struct virgl_hw_res *sres);
79
80 void *(*resource_map)(struct virgl_winsys *vws, struct virgl_hw_res *res);
81 void (*resource_wait)(struct virgl_winsys *vws, struct virgl_hw_res *res);
82 boolean (*resource_is_busy)(struct virgl_winsys *vws,
83 struct virgl_hw_res *res);
84
85 struct virgl_hw_res *(*resource_create_from_handle)(struct virgl_winsys *vws,
86 struct winsys_handle *whandle,
87 uint32_t *plane,
88 uint32_t *stride,
89 uint32_t *plane_offset,
90 uint64_t *modifier,
91 uint32_t *blob_mem);
92 void (*resource_set_type)(struct virgl_winsys *vws,
93 struct virgl_hw_res *res,
94 uint32_t format, uint32_t bind,
95 uint32_t width, uint32_t height,
96 uint32_t usage, uint64_t modifier,
97 uint32_t plane_count,
98 const uint32_t *plane_strides,
99 const uint32_t *plane_offsets);
100
101 boolean (*resource_get_handle)(struct virgl_winsys *vws,
102 struct virgl_hw_res *res,
103 uint32_t stride,
104 struct winsys_handle *whandle);
105
106 struct virgl_cmd_buf *(*cmd_buf_create)(struct virgl_winsys *ws, uint32_t size);
107 void (*cmd_buf_destroy)(struct virgl_cmd_buf *buf);
108
109 void (*emit_res)(struct virgl_winsys *vws, struct virgl_cmd_buf *buf, struct virgl_hw_res *res, boolean write_buffer);
110 int (*submit_cmd)(struct virgl_winsys *vws, struct virgl_cmd_buf *buf,
111 struct pipe_fence_handle **fence);
112
113 boolean (*res_is_referenced)(struct virgl_winsys *vws,
114 struct virgl_cmd_buf *buf,
115 struct virgl_hw_res *res);
116
117 int (*get_caps)(struct virgl_winsys *vws, struct virgl_drm_caps *caps);
118
119 /* fence */
120 struct pipe_fence_handle *(*cs_create_fence)(struct virgl_winsys *vws, int fd);
121 bool (*fence_wait)(struct virgl_winsys *vws,
122 struct pipe_fence_handle *fence,
123 uint64_t timeout);
124
125 void (*fence_reference)(struct virgl_winsys *vws,
126 struct pipe_fence_handle **dst,
127 struct pipe_fence_handle *src);
128
129 /* for sw paths */
130 void (*flush_frontbuffer)(struct virgl_winsys *vws,
131 struct virgl_hw_res *res,
132 unsigned level, unsigned layer,
133 void *winsys_drawable_handle,
134 struct pipe_box *sub_box);
135 void (*fence_server_sync)(struct virgl_winsys *vws,
136 struct virgl_cmd_buf *cbuf,
137 struct pipe_fence_handle *fence);
138
139 int (*fence_get_fd)(struct virgl_winsys *vws,
140 struct pipe_fence_handle *fence);
141 };
142
143 /* this defaults all newer caps,
144 * the kernel will overwrite these if newer version is available.
145 */
virgl_ws_fill_new_caps_defaults(struct virgl_drm_caps * caps)146 static inline void virgl_ws_fill_new_caps_defaults(struct virgl_drm_caps *caps)
147 {
148 caps->caps.v2.min_aliased_point_size = 1.f;
149 caps->caps.v2.max_aliased_point_size = 255.f;
150 caps->caps.v2.min_smooth_point_size = 1.f;
151 caps->caps.v2.max_smooth_point_size = 190.f;
152 caps->caps.v2.min_aliased_line_width = 1.f;
153 caps->caps.v2.max_aliased_line_width = 10.f;
154 caps->caps.v2.min_smooth_line_width = 0.f;
155 caps->caps.v2.max_smooth_line_width = 10.f;
156 caps->caps.v2.max_texture_lod_bias = 15.0f;
157 caps->caps.v2.max_geom_output_vertices = 256;
158 caps->caps.v2.max_geom_total_output_components = 1024;
159 caps->caps.v2.max_vertex_outputs = 32;
160 caps->caps.v2.max_vertex_attribs = 16;
161 caps->caps.v2.max_shader_patch_varyings = 30;
162 caps->caps.v2.min_texel_offset = -8;
163 caps->caps.v2.max_texel_offset = 7;
164 caps->caps.v2.min_texture_gather_offset = -8;
165 caps->caps.v2.max_texture_gather_offset = 7;
166 caps->caps.v2.texture_buffer_offset_alignment = 0;
167 caps->caps.v2.uniform_buffer_offset_alignment = 256;
168 caps->caps.v2.shader_buffer_offset_alignment = 32;
169 caps->caps.v2.capability_bits = 0;
170 caps->caps.v2.max_vertex_attrib_stride = 0;
171 caps->caps.v2.max_image_samples = 0;
172 caps->caps.v2.max_compute_work_group_invocations = 0;
173 caps->caps.v2.max_compute_shared_memory_size = 0;
174 caps->caps.v2.host_feature_check_version = 0;
175 caps->caps.v2.max_shader_sampler_views = 16;
176 for (int shader_type = 0; shader_type < PIPE_SHADER_TYPES; shader_type++) {
177 caps->caps.v2.max_const_buffer_size[shader_type] = 4096 * sizeof(float[4]);
178 }
179 }
180
181 extern enum virgl_formats pipe_to_virgl_format(enum pipe_format format);
182
183 #endif
184