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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/
Dnvidia,tegra124-xusb-padctl.txt1 Device tree binding for NVIDIA Tegra XUSB pad controller
4 The Tegra XUSB pad controller manages a set of I/O lanes (with differential
13 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
20 Pads will be represented as children of the top-level XUSB pad controller
25 The Tegra hardware documentation refers to the connection between the XUSB
26 pad controller and the XUSB controller as "ports". This is confusing since
75 of the pads exposed by the XUSB pad controller. Each pad may need additional
172 by the XUSB pad controller. Per-port configuration is only required for USB.
245 For Tegra124 and Tegra132, the XUSB pad controller exposes the following
252 For Tegra210, the XUSB pad controller exposes the following ports:
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/kernel/linux/linux-5.10/drivers/clk/tegra/
Dclk-tegra-periph.c207 #define XUSB(_name, _parents, _offset, \ macro
743XUSB("xusb_host_src", mux_clkm_pllp_pllc_pllre, CLK_SOURCE_XUSB_HOST_SRC, 143, TEGRA_PERIPH_ON_APB…
744XUSB("xusb_host_src", mux_clkm_pllp_pllre, CLK_SOURCE_XUSB_HOST_SRC, 143, TEGRA_PERIPH_ON_APB | TE…
745XUSB("xusb_falcon_src", mux_clkm_pllp_pllc_pllre, CLK_SOURCE_XUSB_FALCON_SRC, 143, TEGRA_PERIPH_NO…
746XUSB("xusb_falcon_src", mux_clkm_pllp_pllre, CLK_SOURCE_XUSB_FALCON_SRC, 143, TEGRA_PERIPH_NO_RESE…
747XUSB("xusb_fs_src", mux_clkm_48M_pllp_480M, CLK_SOURCE_XUSB_FS_SRC, 143, TEGRA_PERIPH_NO_RESET, te…
748XUSB("xusb_ss_src", mux_clkm_pllre_clk32_480M_pllc_ref, CLK_SOURCE_XUSB_SS_SRC, 143, TEGRA_PERIPH_…
749XUSB("xusb_ss_src", mux_clkm_pllre_clk32_480M, CLK_SOURCE_XUSB_SS_SRC, 143, TEGRA_PERIPH_NO_RESET,…
753XUSB("xusb_dev_src", mux_clkm_pllp_pllc_pllre, CLK_SOURCE_XUSB_DEV_SRC, 95, TEGRA_PERIPH_ON_APB | …
754XUSB("xusb_dev_src", mux_clkm_pllp_pllre, CLK_SOURCE_XUSB_DEV_SRC, 95, TEGRA_PERIPH_ON_APB | TEGRA…
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dnvidia,tegra124-xusb-padctl.txt1 Device tree binding for NVIDIA Tegra XUSB pad controller
4 NOTE: It turns out that this binding isn't an accurate description of the XUSB
10 The Tegra XUSB pad controller manages a set of lanes, each of which can be
14 This document defines the device-specific binding for the XUSB pad controller.
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/
Dnvidia,tegra124-xusb.txt5 the Tegra XUSB pad controller.
14 - reg: Must contain the base and length of the xHCI host registers, XUSB FPCI
15 registers and XUSB IPFS registers.
42 - nvidia,xusb-padctl: phandle to the XUSB pad controller that is used to
/kernel/linux/linux-5.10/drivers/phy/tegra/
DKconfig3 tristate "NVIDIA Tegra XUSB pad controller driver"
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/ata/
Dnvidia,tegra124-ahci.txt27 - sata-phy : XUSB PADCTL SATA PHY
/kernel/linux/linux-5.10/arch/arm64/boot/dts/nvidia/
Dtegra210-p3450-0000.dts459 /* these really belong to the XUSB pad controller */
/kernel/linux/linux-5.10/
DMAINTAINERS17248 TEGRA XUSB PADCTL DRIVER