| /kernel/linux/linux-5.10/drivers/dma/ |
| D | fsldma.c | 38 #define chan_dbg(chan, fmt, arg...) \ argument
39 dev_dbg(chan->dev, "%s: " fmt, chan->name, ##arg)
40 #define chan_err(chan, fmt, arg...) \ argument
41 dev_err(chan->dev, "%s: " fmt, chan->name, ##arg)
49 static void set_sr(struct fsldma_chan *chan, u32 val) in set_sr() argument
51 FSL_DMA_OUT(chan, &chan->regs->sr, val, 32); in set_sr()
54 static u32 get_sr(struct fsldma_chan *chan) in get_sr() argument
56 return FSL_DMA_IN(chan, &chan->regs->sr, 32); in get_sr()
59 static void set_mr(struct fsldma_chan *chan, u32 val) in set_mr() argument
61 FSL_DMA_OUT(chan, &chan->regs->mr, val, 32); in set_mr()
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| D | stm32-dma.c | 216 struct stm32_dma_chan chan[STM32_DMA_MAX_CHANNELS]; member
219 static struct stm32_dma_device *stm32_dma_get_dev(struct stm32_dma_chan *chan) in stm32_dma_get_dev() argument
221 return container_of(chan->vchan.chan.device, struct stm32_dma_device, in stm32_dma_get_dev()
227 return container_of(c, struct stm32_dma_chan, vchan.chan); in to_stm32_dma_chan()
235 static struct device *chan2dev(struct stm32_dma_chan *chan) in chan2dev() argument
237 return &chan->vchan.chan.dev->device; in chan2dev()
250 static int stm32_dma_get_width(struct stm32_dma_chan *chan, in stm32_dma_get_width() argument
261 dev_err(chan2dev(chan), "Dma bus width not supported\n"); in stm32_dma_get_width()
344 static int stm32_dma_get_burst(struct stm32_dma_chan *chan, u32 maxburst) in stm32_dma_get_burst() argument
357 dev_err(chan2dev(chan), "Dma burst size not supported\n"); in stm32_dma_get_burst()
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| D | dmaengine.c | 86 struct dma_chan *chan; in dmaengine_dbg_summary_show() local
88 list_for_each_entry(chan, &dma_dev->channels, device_node) { in dmaengine_dbg_summary_show()
89 if (chan->client_count) { in dmaengine_dbg_summary_show()
90 seq_printf(s, " %-13s| %s", dma_chan_name(chan), in dmaengine_dbg_summary_show()
91 chan->dbg_client_name ?: "in-use"); in dmaengine_dbg_summary_show()
93 if (chan->router) in dmaengine_dbg_summary_show()
95 dev_name(chan->router->dev)); in dmaengine_dbg_summary_show()
159 return chan_dev->chan; in dev_to_dma_chan()
165 struct dma_chan *chan; in memcpy_count_show() local
171 chan = dev_to_dma_chan(dev); in memcpy_count_show()
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| /kernel/linux/linux-5.10/net/bluetooth/ |
| D | l2cap_core.c | 59 static int l2cap_build_conf_req(struct l2cap_chan *chan, void *data, size_t data_size);
60 static void l2cap_send_disconn_req(struct l2cap_chan *chan, int err);
62 static void l2cap_tx(struct l2cap_chan *chan, struct l2cap_ctrl *control,
206 int l2cap_add_psm(struct l2cap_chan *chan, bdaddr_t *src, __le16 psm) in l2cap_add_psm() argument
212 if (psm && __l2cap_global_chan_by_addr(psm, src, chan->src_type)) { in l2cap_add_psm()
218 chan->psm = psm; in l2cap_add_psm()
219 chan->sport = psm; in l2cap_add_psm()
224 if (chan->src_type == BDADDR_BREDR) { in l2cap_add_psm()
237 chan->src_type)) { in l2cap_add_psm()
238 chan->psm = cpu_to_le16(p); in l2cap_add_psm()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/ |
| D | nouveau_chan.c | 51 struct nouveau_channel *chan = container_of(ntfy, typeof(*chan), kill); in nouveau_channel_killed() local
52 struct nouveau_cli *cli = (void *)chan->user.client; in nouveau_channel_killed()
53 NV_PRINTK(warn, cli, "channel %d killed!\n", chan->chid); in nouveau_channel_killed()
54 atomic_set(&chan->killed, 1); in nouveau_channel_killed()
55 if (chan->fence) in nouveau_channel_killed()
56 nouveau_fence_context_kill(chan->fence, -ENODEV); in nouveau_channel_killed()
61 nouveau_channel_idle(struct nouveau_channel *chan) in nouveau_channel_idle() argument
63 if (likely(chan && chan->fence && !atomic_read(&chan->killed))) { in nouveau_channel_idle()
64 struct nouveau_cli *cli = (void *)chan->user.client; in nouveau_channel_idle()
68 ret = nouveau_fence_new(chan, false, &fence); in nouveau_channel_idle()
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| D | nouveau_dma.c | 41 READ_GET(struct nouveau_channel *chan, uint64_t *prev_get, int *timeout) in READ_GET() argument
45 val = nvif_rd32(&chan->user, chan->user_get); in READ_GET()
46 if (chan->user_get_hi) in READ_GET()
47 val |= (uint64_t)nvif_rd32(&chan->user, chan->user_get_hi) << 32; in READ_GET()
64 if (val < chan->push.addr || in READ_GET()
65 val > chan->push.addr + (chan->dma.max << 2)) in READ_GET()
68 return (val - chan->push.addr) >> 2; in READ_GET()
72 nv50_dma_push(struct nouveau_channel *chan, u64 offset, int length) in nv50_dma_push() argument
74 struct nvif_user *user = &chan->drm->client.device.user; in nv50_dma_push()
75 struct nouveau_bo *pb = chan->push.buffer; in nv50_dma_push()
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| /kernel/linux/linux-5.10/arch/um/drivers/ |
| D | chan_kern.c | 84 static int open_one_chan(struct chan *chan) in open_one_chan() argument
88 if (chan->opened) in open_one_chan()
91 if (chan->ops->open == NULL) in open_one_chan()
93 else fd = (*chan->ops->open)(chan->input, chan->output, chan->primary, in open_one_chan()
94 chan->data, &chan->dev); in open_one_chan()
100 (*chan->ops->close)(fd, chan->data); in open_one_chan()
104 chan->fd = fd; in open_one_chan()
106 chan->opened = 1; in open_one_chan()
113 struct chan *chan; in open_chan() local
117 chan = list_entry(ele, struct chan, list); in open_chan()
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| /kernel/linux/linux-5.10/drivers/dma/xilinx/ |
| D | xilinx_dma.c | 447 void (*start_transfer)(struct xilinx_dma_chan *chan);
448 int (*stop_transfer)(struct xilinx_dma_chan *chan);
501 struct xilinx_dma_chan *chan[XILINX_MCDMA_MAX_CHANS_PER_DEVICE]; member
517 #define to_xilinx_chan(chan) \ argument
518 container_of(chan, struct xilinx_dma_chan, common)
521 #define xilinx_dma_poll_timeout(chan, reg, val, cond, delay_us, timeout_us) \ argument
522 readl_poll_timeout_atomic(chan->xdev->regs + chan->ctrl_offset + reg, \
526 static inline u32 dma_read(struct xilinx_dma_chan *chan, u32 reg) in dma_read() argument
528 return ioread32(chan->xdev->regs + reg); in dma_read()
531 static inline void dma_write(struct xilinx_dma_chan *chan, u32 reg, u32 value) in dma_write() argument
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| D | zynqmp_dma.c | 143 #define ZYNQMP_DMA_DESC_SIZE(chan) (chan->desc_size) argument
145 #define to_chan(chan) container_of(chan, struct zynqmp_dma_chan, \ argument
253 struct zynqmp_dma_chan *chan; member
258 static inline void zynqmp_dma_writeq(struct zynqmp_dma_chan *chan, u32 reg, in zynqmp_dma_writeq() argument
261 lo_hi_writeq(value, chan->regs + reg); in zynqmp_dma_writeq()
269 static void zynqmp_dma_update_desc_to_ctrlr(struct zynqmp_dma_chan *chan, in zynqmp_dma_update_desc_to_ctrlr() argument
275 zynqmp_dma_writeq(chan, ZYNQMP_DMA_SRC_START_LSB, addr); in zynqmp_dma_update_desc_to_ctrlr()
277 zynqmp_dma_writeq(chan, ZYNQMP_DMA_DST_START_LSB, addr); in zynqmp_dma_update_desc_to_ctrlr()
285 static void zynqmp_dma_desc_config_eod(struct zynqmp_dma_chan *chan, in zynqmp_dma_desc_config_eod() argument
304 static void zynqmp_dma_config_sg_ll_desc(struct zynqmp_dma_chan *chan, in zynqmp_dma_config_sg_ll_desc() argument
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| /kernel/linux/linux-5.10/drivers/video/fbdev/savage/ |
| D | savagefb-i2c.c | 47 struct savagefb_i2c_chan *chan = data; in savage4_gpio_setscl() local
50 r = readl(chan->ioaddr + chan->reg); in savage4_gpio_setscl()
55 writel(r, chan->ioaddr + chan->reg); in savage4_gpio_setscl()
56 readl(chan->ioaddr + chan->reg); /* flush posted write */ in savage4_gpio_setscl()
61 struct savagefb_i2c_chan *chan = data; in savage4_gpio_setsda() local
64 r = readl(chan->ioaddr + chan->reg); in savage4_gpio_setsda()
69 writel(r, chan->ioaddr + chan->reg); in savage4_gpio_setsda()
70 readl(chan->ioaddr + chan->reg); /* flush posted write */ in savage4_gpio_setsda()
75 struct savagefb_i2c_chan *chan = data; in savage4_gpio_getscl() local
77 return (0 != (readl(chan->ioaddr + chan->reg) & SAVAGE4_I2C_SCL_IN)); in savage4_gpio_getscl()
[all …]
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| /kernel/linux/linux-5.10/drivers/mailbox/ |
| D | mailbox.c | 26 static int add_to_rbuf(struct mbox_chan *chan, void *mssg) in add_to_rbuf() argument
31 spin_lock_irqsave(&chan->lock, flags); in add_to_rbuf()
34 if (chan->msg_count == MBOX_TX_QUEUE_LEN) { in add_to_rbuf()
35 spin_unlock_irqrestore(&chan->lock, flags); in add_to_rbuf()
39 idx = chan->msg_free; in add_to_rbuf()
40 chan->msg_data[idx] = mssg; in add_to_rbuf()
41 chan->msg_count++; in add_to_rbuf()
44 chan->msg_free = 0; in add_to_rbuf()
46 chan->msg_free++; in add_to_rbuf()
48 spin_unlock_irqrestore(&chan->lock, flags); in add_to_rbuf()
[all …]
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| /kernel/linux/linux-5.10/arch/sh/drivers/dma/ |
| D | dma-sh.c | 39 static unsigned long dma_find_base(unsigned int chan) in dma_find_base() argument
44 if (chan >= SH_DMAC_NR_MD_CH) in dma_find_base()
51 static unsigned long dma_base_addr(unsigned int chan) in dma_base_addr() argument
53 unsigned long base = dma_find_base(chan); in dma_base_addr()
55 chan = (chan % SH_DMAC_NR_MD_CH) * SH_DMAC_CH_SZ; in dma_base_addr()
58 if (chan >= DMAOR) in dma_base_addr()
61 return base + chan; in dma_base_addr()
65 static inline unsigned int get_dmte_irq(unsigned int chan) in get_dmte_irq() argument
67 return chan >= 6 ? DMTE6_IRQ : DMTE0_IRQ; in get_dmte_irq()
87 static inline unsigned int get_dmte_irq(unsigned int chan) in get_dmte_irq() argument
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| /kernel/linux/linux-5.10/drivers/video/fbdev/i810/ |
| D | i810-i2c.c | 44 struct i810fb_i2c_chan *chan = data; in i810i2c_setscl() local
45 struct i810fb_par *par = chan->par; in i810i2c_setscl()
49 i810_writel(mmio, chan->ddc_base, SCL_DIR_MASK | SCL_VAL_MASK); in i810i2c_setscl()
51 i810_writel(mmio, chan->ddc_base, SCL_DIR | SCL_DIR_MASK | SCL_VAL_MASK); in i810i2c_setscl()
52 i810_readl(mmio, chan->ddc_base); /* flush posted write */ in i810i2c_setscl()
57 struct i810fb_i2c_chan *chan = data; in i810i2c_setsda() local
58 struct i810fb_par *par = chan->par; in i810i2c_setsda()
62 i810_writel(mmio, chan->ddc_base, SDA_DIR_MASK | SDA_VAL_MASK); in i810i2c_setsda()
64 i810_writel(mmio, chan->ddc_base, SDA_DIR | SDA_DIR_MASK | SDA_VAL_MASK); in i810i2c_setsda()
65 i810_readl(mmio, chan->ddc_base); /* flush posted write */ in i810i2c_setsda()
[all …]
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| /kernel/linux/linux-5.10/arch/mips/include/asm/mach-au1x00/ |
| D | au1000_dma.h | 156 struct dma_chan *chan = get_dma_chan(dmanr); in enable_dma_buffer0() local
158 if (!chan) in enable_dma_buffer0()
160 __raw_writel(DMA_BE0, chan->io + DMA_MODE_SET); in enable_dma_buffer0()
165 struct dma_chan *chan = get_dma_chan(dmanr); in enable_dma_buffer1() local
167 if (!chan) in enable_dma_buffer1()
169 __raw_writel(DMA_BE1, chan->io + DMA_MODE_SET); in enable_dma_buffer1()
173 struct dma_chan *chan = get_dma_chan(dmanr); in enable_dma_buffers() local
175 if (!chan) in enable_dma_buffers()
177 __raw_writel(DMA_BE0 | DMA_BE1, chan->io + DMA_MODE_SET); in enable_dma_buffers()
182 struct dma_chan *chan = get_dma_chan(dmanr); in start_dma() local
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| /kernel/linux/linux-5.10/sound/soc/qcom/ |
| D | lpass-lpaif-reg.h | 87 #define LPAIF_IRQ_PER(chan) (1 << (LPAIF_IRQ_BITSTRIDE * (chan))) argument
88 #define LPAIF_IRQ_XRUN(chan) (2 << (LPAIF_IRQ_BITSTRIDE * (chan))) argument
89 #define LPAIF_IRQ_ERR(chan) (4 << (LPAIF_IRQ_BITSTRIDE * (chan))) argument
91 #define LPAIF_IRQ_ALL(chan) (7 << (LPAIF_IRQ_BITSTRIDE * (chan))) argument
92 #define LPAIF_IRQ_HDMI_REQ_ON_PRELOAD(chan) (1 << (14 + chan)) argument
93 #define LPAIF_IRQ_HDMI_SDEEP_AUD_DIS(chan) (1 << (24 + chan)) argument
97 #define LPAIF_HDMI_RDMA_REG_ADDR(v, addr, chan) \ argument
98 (v->hdmi_rdma_reg_base + (addr) + v->hdmi_rdma_reg_stride * (chan))
102 #define LPAIF_HDMI_RDMACTL_REG(v, chan) LPAIF_HDMI_RDMA_REG_ADDR(v, 0x00, (chan)) argument
103 #define LPAIF_HDMI_RDMABASE_REG(v, chan) LPAIF_HDMI_RDMA_REG_ADDR(v, 0x04, (chan)) argument
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| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
| D | nv25.c | 25 struct nv20_gr_chan *chan; in nv25_gr_chan_new() local
28 if (!(chan = kzalloc(sizeof(*chan), GFP_KERNEL))) in nv25_gr_chan_new()
30 nvkm_object_ctor(&nv25_gr_chan, oclass, &chan->object); in nv25_gr_chan_new()
31 chan->gr = gr; in nv25_gr_chan_new()
32 chan->chid = fifoch->chid; in nv25_gr_chan_new()
33 *pobject = &chan->object; in nv25_gr_chan_new()
37 &chan->inst); in nv25_gr_chan_new()
41 nvkm_kmap(chan->inst); in nv25_gr_chan_new()
42 nvkm_wo32(chan->inst, 0x0028, 0x00000001 | (chan->chid << 24)); in nv25_gr_chan_new()
43 nvkm_wo32(chan->inst, 0x035c, 0xffff0000); in nv25_gr_chan_new()
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| D | nv34.c | 25 struct nv20_gr_chan *chan; in nv34_gr_chan_new() local
28 if (!(chan = kzalloc(sizeof(*chan), GFP_KERNEL))) in nv34_gr_chan_new()
30 nvkm_object_ctor(&nv34_gr_chan, oclass, &chan->object); in nv34_gr_chan_new()
31 chan->gr = gr; in nv34_gr_chan_new()
32 chan->chid = fifoch->chid; in nv34_gr_chan_new()
33 *pobject = &chan->object; in nv34_gr_chan_new()
37 &chan->inst); in nv34_gr_chan_new()
41 nvkm_kmap(chan->inst); in nv34_gr_chan_new()
42 nvkm_wo32(chan->inst, 0x0028, 0x00000001 | (chan->chid << 24)); in nv34_gr_chan_new()
43 nvkm_wo32(chan->inst, 0x040c, 0x01000101); in nv34_gr_chan_new()
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| D | nv35.c | 25 struct nv20_gr_chan *chan; in nv35_gr_chan_new() local
28 if (!(chan = kzalloc(sizeof(*chan), GFP_KERNEL))) in nv35_gr_chan_new()
30 nvkm_object_ctor(&nv35_gr_chan, oclass, &chan->object); in nv35_gr_chan_new()
31 chan->gr = gr; in nv35_gr_chan_new()
32 chan->chid = fifoch->chid; in nv35_gr_chan_new()
33 *pobject = &chan->object; in nv35_gr_chan_new()
37 &chan->inst); in nv35_gr_chan_new()
41 nvkm_kmap(chan->inst); in nv35_gr_chan_new()
42 nvkm_wo32(chan->inst, 0x0028, 0x00000001 | (chan->chid << 24)); in nv35_gr_chan_new()
43 nvkm_wo32(chan->inst, 0x040c, 0x00000101); in nv35_gr_chan_new()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/gma500/ |
| D | oaktrail_lvds_i2c.c | 63 #define LPC_READ_REG(chan, r) inl((chan)->reg + (r)) argument
64 #define LPC_WRITE_REG(chan, r, val) outl((val), (chan)->reg + (r)) argument
68 struct psb_intel_i2c_chan *chan = data; in get_clock() local
71 val = LPC_READ_REG(chan, RGIO); in get_clock()
73 LPC_WRITE_REG(chan, RGIO, val); in get_clock()
74 tmp = LPC_READ_REG(chan, RGLVL); in get_clock()
75 val = (LPC_READ_REG(chan, RGLVL) & GPIO_CLOCK) ? 1 : 0; in get_clock()
82 struct psb_intel_i2c_chan *chan = data; in get_data() local
85 val = LPC_READ_REG(chan, RGIO); in get_data()
87 LPC_WRITE_REG(chan, RGIO, val); in get_data()
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| D | intel_i2c.c | 25 struct psb_intel_i2c_chan *chan = data; in get_clock() local
26 struct drm_device *dev = chan->drm_dev; in get_clock()
29 val = REG_READ(chan->reg); in get_clock()
35 struct psb_intel_i2c_chan *chan = data; in get_data() local
36 struct drm_device *dev = chan->drm_dev; in get_data()
39 val = REG_READ(chan->reg); in get_data()
45 struct psb_intel_i2c_chan *chan = data; in set_clock() local
46 struct drm_device *dev = chan->drm_dev; in set_clock()
51 REG_READ(chan->reg) & (GPIO_DATA_PULLUP_DISABLE | in set_clock()
59 REG_WRITE(chan->reg, reserved | clock_bits); in set_clock()
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| /kernel/linux/linux-5.10/include/sound/ |
| D | emu8000_reg.h | 24 #define EMU8000_CMD(reg, chan) ((reg)<<5 | (chan)) argument
30 #define EMU8000_CPF_READ(emu, chan) \ argument
31 snd_emu8000_peek_dw((emu), EMU8000_DATA0(emu), EMU8000_CMD(0, (chan)))
32 #define EMU8000_PTRX_READ(emu, chan) \ argument
33 snd_emu8000_peek_dw((emu), EMU8000_DATA0(emu), EMU8000_CMD(1, (chan)))
34 #define EMU8000_CVCF_READ(emu, chan) \ argument
35 snd_emu8000_peek_dw((emu), EMU8000_DATA0(emu), EMU8000_CMD(2, (chan)))
36 #define EMU8000_VTFT_READ(emu, chan) \ argument
37 snd_emu8000_peek_dw((emu), EMU8000_DATA0(emu), EMU8000_CMD(3, (chan)))
38 #define EMU8000_PSST_READ(emu, chan) \ argument
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| /kernel/linux/linux-5.10/drivers/video/fbdev/nvidia/ |
| D | nv_i2c.c | 30 struct nvidia_i2c_chan *chan = data; in nvidia_gpio_setscl() local
31 struct nvidia_par *par = chan->par; in nvidia_gpio_setscl()
34 val = NVReadCrtc(par, chan->ddc_base + 1) & 0xf0; in nvidia_gpio_setscl()
41 NVWriteCrtc(par, chan->ddc_base + 1, val | 0x01); in nvidia_gpio_setscl()
46 struct nvidia_i2c_chan *chan = data; in nvidia_gpio_setsda() local
47 struct nvidia_par *par = chan->par; in nvidia_gpio_setsda()
50 val = NVReadCrtc(par, chan->ddc_base + 1) & 0xf0; in nvidia_gpio_setsda()
57 NVWriteCrtc(par, chan->ddc_base + 1, val | 0x01); in nvidia_gpio_setsda()
62 struct nvidia_i2c_chan *chan = data; in nvidia_gpio_getscl() local
63 struct nvidia_par *par = chan->par; in nvidia_gpio_getscl()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/fifo/ |
| D | chan.c | 34 struct nvkm_fifo_chan *chan; member
44 struct nvkm_fifo_chan *chan = object->chan; in nvkm_fifo_chan_child_fini() local
45 struct nvkm_fifo_engn *engn = &chan->engn[engine->subdev.index]; in nvkm_fifo_chan_child_fini()
52 if (chan->func->engine_fini) { in nvkm_fifo_chan_child_fini()
53 ret = chan->func->engine_fini(chan, engine, suspend); in nvkm_fifo_chan_child_fini()
55 nvif_error(&chan->object, in nvkm_fifo_chan_child_fini()
67 nvif_trace(&chan->object, "detached %s\n", name); in nvkm_fifo_chan_child_fini()
77 struct nvkm_fifo_chan *chan = object->chan; in nvkm_fifo_chan_child_init() local
78 struct nvkm_fifo_engn *engn = &chan->engn[engine->subdev.index]; in nvkm_fifo_chan_child_init()
91 if (chan->func->engine_init) { in nvkm_fifo_chan_child_init()
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| /kernel/linux/linux-5.10/drivers/dma/sf-pdma/ |
| D | sf-pdma.c | 44 return container_of(dchan, struct sf_pdma_chan, vchan.chan); in to_sf_pdma_chan()
52 static struct sf_pdma_desc *sf_pdma_alloc_desc(struct sf_pdma_chan *chan) in sf_pdma_alloc_desc() argument
60 desc->chan = chan; in sf_pdma_alloc_desc()
74 static void sf_pdma_disclaim_chan(struct sf_pdma_chan *chan) in sf_pdma_disclaim_chan() argument
76 struct pdma_regs *regs = &chan->regs; in sf_pdma_disclaim_chan()
85 struct sf_pdma_chan *chan = to_sf_pdma_chan(dchan); in sf_pdma_prep_dma_memcpy() local
89 if (chan && (!len || !dest || !src)) { in sf_pdma_prep_dma_memcpy()
90 dev_err(chan->pdma->dma_dev.dev, in sf_pdma_prep_dma_memcpy()
95 desc = sf_pdma_alloc_desc(chan); in sf_pdma_prep_dma_memcpy()
101 desc->async_tx = vchan_tx_prep(&chan->vchan, &desc->vdesc, flags); in sf_pdma_prep_dma_memcpy()
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| /kernel/linux/linux-5.10/drivers/video/fbdev/riva/ |
| D | rivafb-i2c.c | 29 struct riva_i2c_chan *chan = data; in riva_gpio_setscl() local
30 struct riva_par *par = chan->par; in riva_gpio_setscl()
33 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); in riva_gpio_setscl()
41 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); in riva_gpio_setscl()
47 struct riva_i2c_chan *chan = data; in riva_gpio_setsda() local
48 struct riva_par *par = chan->par; in riva_gpio_setsda()
51 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); in riva_gpio_setsda()
59 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); in riva_gpio_setsda()
65 struct riva_i2c_chan *chan = data; in riva_gpio_getscl() local
66 struct riva_par *par = chan->par; in riva_gpio_getscl()
[all …]
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