| /kernel/linux/linux-5.10/drivers/infiniband/hw/mlx5/ |
| D | qpc.c | 13 struct mlx5_core_dct *dct);
96 struct mlx5_core_dct *dct; in rsc_event_notifier() local
105 rsn = be32_to_cpu(eqe->data.dct.dctn) & 0xffffff; in rsc_event_notifier()
140 dct = (struct mlx5_core_dct *)common; in rsc_event_notifier()
142 complete(&dct->drained); in rsc_event_notifier()
190 struct mlx5_core_dct *dct, bool need_cleanup) in _mlx5_core_destroy_dct() argument
193 struct mlx5_core_qp *qp = &dct->mqp; in _mlx5_core_destroy_dct()
196 err = mlx5_core_drain_dct(dev, dct); in _mlx5_core_destroy_dct()
203 wait_for_completion(&dct->drained); in _mlx5_core_destroy_dct()
206 destroy_resource_common(dev, &dct->mqp); in _mlx5_core_destroy_dct()
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| D | qp.h | 21 int mlx5_core_destroy_dct(struct mlx5_ib_dev *dev, struct mlx5_core_dct *dct);
24 int mlx5_core_dct_query(struct mlx5_ib_dev *dev, struct mlx5_core_dct *dct,
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| D | qp.c | 2414 qp->dct.in = kzalloc(MLX5_ST_SZ_BYTES(create_dct_in), GFP_KERNEL); in create_dct()
2415 if (!qp->dct.in) in create_dct()
2418 MLX5_SET(create_dct_in, qp->dct.in, uid, to_mpd(pd)->uid); in create_dct()
2419 dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); in create_dct()
2443 if (attr->qp_type == IB_QPT_DRIVER && !MLX5_CAP_GEN(dev->mdev, dct)) in check_qp_type()
2857 err = mlx5_core_destroy_dct(dev, &mqp->dct.mdct); in mlx5_ib_destroy_dct()
2864 kfree(mqp->dct.in); in mlx5_ib_destroy_dct()
4149 dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); in mlx5_ib_modify_dct()
4222 err = mlx5_core_create_dct(dev, &qp->dct.mdct, qp->dct.in, in mlx5_ib_modify_dct()
4227 resp.dctn = qp->dct.mdct.mqp.qpn; in mlx5_ib_modify_dct()
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| D | mlx5_ib.h | 409 struct mlx5_ib_dct dct; member
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| D | devx.c | 582 qp->dct.mdct.mqp.qpn) == obj_id; in devx_is_valid_obj_id()
2268 obj_id = be32_to_cpu(eqe->data.dct.dctn) & 0xffffff; in devx_get_obj_id_from_event()
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| /kernel/linux/linux-5.10/drivers/edac/ |
| D | amd64_edac.c | 89 static void f15h_select_dct(struct amd64_pvt *pvt, u8 dct) in f15h_select_dct() argument
95 reg |= dct; in f15h_select_dct()
113 static inline int amd64_read_dct_pci_cfg(struct amd64_pvt *pvt, u8 dct, in amd64_read_dct_pci_cfg() argument
118 if (dct || offset >= 0x100) in amd64_read_dct_pci_cfg()
123 if (dct) { in amd64_read_dct_pci_cfg()
141 dct = (dct && pvt->model == 0x30) ? 3 : dct; in amd64_read_dct_pci_cfg()
142 f15h_select_dct(pvt, dct); in amd64_read_dct_pci_cfg()
146 if (dct) in amd64_read_dct_pci_cfg()
385 static void get_cs_base_and_mask(struct amd64_pvt *pvt, int csrow, u8 dct, in get_cs_base_and_mask() argument
392 csbase = pvt->csels[dct].csbases[csrow]; in get_cs_base_and_mask()
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| D | amd64_edac.h | 178 #define csrow_enabled(i, dct, pvt) ((pvt)->csels[(dct)].csbases[(i)] & DCSB_CS_ENABLE) argument
179 #define csrow_sec_enabled(i, dct, pvt) ((pvt)->csels[(dct)].csbases_sec[(i)] & DCSB_CS_ENABLE) argument
481 int (*dbam_to_cs) (struct amd64_pvt *pvt, u8 dct,
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| /kernel/linux/linux-5.10/drivers/soc/fsl/dpio/ |
| D | qbman-portal.h | 208 enum qbman_pull_type_e dct);
210 enum qbman_pull_type_e dct);
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| D | qbman-portal.c | 1061 enum qbman_pull_type_e dct) in qbman_pull_desc_set_wq() argument
1063 d->verb |= dct << QB_VDQCR_VERB_DCT_SHIFT; in qbman_pull_desc_set_wq()
1075 enum qbman_pull_type_e dct) in qbman_pull_desc_set_channel() argument
1077 d->verb |= dct << QB_VDQCR_VERB_DCT_SHIFT; in qbman_pull_desc_set_channel()
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| /kernel/linux/linux-5.10/drivers/net/ethernet/mellanox/mlx5/core/ |
| D | main.c | 553 if (MLX5_CAP_GEN_MAX(dev, dct)) in handle_hca_cap()
554 MLX5_SET(cmd_hca_cap, set_hca_cap, dct, 1); in handle_hca_cap()
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| D | eq.c | 580 if (MLX5_CAP_GEN_MAX(dev, dct)) in gather_async_events_mask()
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| /kernel/linux/linux-5.10/include/linux/mlx5/ |
| D | device.h | 735 struct mlx5_eqe_dct dct; member
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| D | mlx5_ifc.h | 1393 u8 dct[0x1]; member
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| /kernel/linux/linux-5.10/arch/ia64/include/asm/ |
| D | pal.h | 1293 dct :4, /* Date cache tracking */ member
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