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/kernel/linux/linux-5.10/drivers/clk/at91/
Dclk-programmable.c18 #define PROG_PRES(layout, pckr) ((pckr >> layout->pres_shift) & layout->pres_mask) argument
26 const struct clk_programmable_layout *layout; member
35 const struct clk_programmable_layout *layout = prog->layout; in clk_programmable_recalc_rate() local
41 if (layout->is_pres_direct) in clk_programmable_recalc_rate()
42 rate = parent_rate / (PROG_PRES(layout, pckr) + 1); in clk_programmable_recalc_rate()
44 rate = parent_rate >> PROG_PRES(layout, pckr); in clk_programmable_recalc_rate()
53 const struct clk_programmable_layout *layout = prog->layout; in clk_programmable_determine_rate() local
67 if (layout->is_pres_direct) { in clk_programmable_determine_rate()
68 for (shift = 0; shift <= layout->pres_mask; shift++) { in clk_programmable_determine_rate()
74 for (shift = 0; shift < layout->pres_mask; shift++) { in clk_programmable_determine_rate()
[all …]
Dclk-generated.c29 const struct clk_pcr_layout *layout; member
46 regmap_write(gck->regmap, gck->layout->offset, in clk_generated_enable()
47 (gck->id & gck->layout->pid_mask)); in clk_generated_enable()
48 regmap_update_bits(gck->regmap, gck->layout->offset, in clk_generated_enable()
49 AT91_PMC_PCR_GCKDIV_MASK | gck->layout->gckcss_mask | in clk_generated_enable()
50 gck->layout->cmd | AT91_PMC_PCR_GCKEN, in clk_generated_enable()
51 field_prep(gck->layout->gckcss_mask, gck->parent_id) | in clk_generated_enable()
52 gck->layout->cmd | in clk_generated_enable()
65 regmap_write(gck->regmap, gck->layout->offset, in clk_generated_disable()
66 (gck->id & gck->layout->pid_mask)); in clk_generated_disable()
[all …]
Dclk-pll.c20 #define PLL_MUL(reg, layout) (((reg) >> (layout)->mul_shift) & \ argument
21 (layout)->mul_mask)
23 #define PLL_MUL_MASK(layout) ((layout)->mul_mask) argument
24 #define PLL_MUL_MAX(layout) (PLL_MUL_MASK(layout) + 1) argument
41 const struct clk_pll_layout *layout; member
58 const struct clk_pll_layout *layout = pll->layout; in clk_pll_prepare() local
72 mul = PLL_MUL(pllr, layout); in clk_pll_prepare()
86 regmap_update_bits(regmap, offset, layout->pllr_mask, in clk_pll_prepare()
89 ((pll->mul & layout->mul_mask) << layout->mul_shift)); in clk_pll_prepare()
107 unsigned int mask = pll->layout->pllr_mask; in clk_pll_unprepare()
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Dclk-peripheral.c39 const struct clk_pcr_layout *layout; member
167 regmap_write(periph->regmap, periph->layout->offset, in clk_sam9x5_peripheral_enable()
168 (periph->id & periph->layout->pid_mask)); in clk_sam9x5_peripheral_enable()
169 regmap_update_bits(periph->regmap, periph->layout->offset, in clk_sam9x5_peripheral_enable()
170 periph->layout->div_mask | periph->layout->cmd | in clk_sam9x5_peripheral_enable()
172 field_prep(periph->layout->div_mask, periph->div) | in clk_sam9x5_peripheral_enable()
173 periph->layout->cmd | in clk_sam9x5_peripheral_enable()
189 regmap_write(periph->regmap, periph->layout->offset, in clk_sam9x5_peripheral_disable()
190 (periph->id & periph->layout->pid_mask)); in clk_sam9x5_peripheral_disable()
191 regmap_update_bits(periph->regmap, periph->layout->offset, in clk_sam9x5_peripheral_disable()
[all …]
Dclk-sam9x60-pll.c34 const struct clk_pll_layout *layout; member
91 cmul = (val & core->layout->mul_mask) >> core->layout->mul_shift; in sam9x60_frac_pll_prepare()
92 cfrac = (val & core->layout->frac_mask) >> core->layout->frac_shift; in sam9x60_frac_pll_prepare()
106 (frac->mul << core->layout->mul_shift) | in sam9x60_frac_pll_prepare()
107 (frac->frac << core->layout->frac_shift)); in sam9x60_frac_pll_prepare()
253 cdiv = (val & core->layout->div_mask) >> core->layout->div_shift; in sam9x60_div_pll_prepare()
256 if (!!(val & core->layout->endiv_mask) && cdiv == div->div) in sam9x60_div_pll_prepare()
260 core->layout->div_mask | core->layout->endiv_mask, in sam9x60_div_pll_prepare()
261 (div->div << core->layout->div_shift) | in sam9x60_div_pll_prepare()
262 (1 << core->layout->endiv_shift)); in sam9x60_div_pll_prepare()
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Dpmc.h129 const struct clk_pcr_layout *layout,
160 const struct clk_master_layout *layout,
175 const struct clk_pcr_layout *layout,
183 const struct clk_pll_layout *layout,
193 const struct clk_pll_layout *layout, bool critical);
200 const struct clk_pll_layout *layout, bool critical);
205 const struct clk_programmable_layout *layout,
Dclk-master.c38 const struct clk_master_layout *layout; member
82 const struct clk_master_layout *layout = master->layout; in clk_master_recalc_rate() local
87 regmap_read(master->regmap, master->layout->offset, &mckr); in clk_master_recalc_rate()
88 mckr &= layout->mask; in clk_master_recalc_rate()
90 pres = (mckr >> layout->pres_shift) & MASTER_PRES_MASK; in clk_master_recalc_rate()
113 regmap_read(master->regmap, master->layout->offset, &mckr); in clk_master_get_parent()
129 const struct clk_master_layout *layout, in at91_clk_register_master() argument
151 master->layout = layout; in at91_clk_register_master()
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_formats.c602 struct dpu_hw_fmt_layout *layout) in _dpu_format_get_plane_sizes_ubwc() argument
608 memset(layout, 0, sizeof(struct dpu_hw_fmt_layout)); in _dpu_format_get_plane_sizes_ubwc()
609 layout->format = fmt; in _dpu_format_get_plane_sizes_ubwc()
610 layout->width = width; in _dpu_format_get_plane_sizes_ubwc()
611 layout->height = height; in _dpu_format_get_plane_sizes_ubwc()
612 layout->num_planes = fmt->num_planes; in _dpu_format_get_plane_sizes_ubwc()
621 if (DPU_FORMAT_IS_YUV(layout->format)) { in _dpu_format_get_plane_sizes_ubwc()
626 layout->num_planes = 2; in _dpu_format_get_plane_sizes_ubwc()
627 layout->plane_pitch[0] = VENUS_Y_STRIDE(color, width); in _dpu_format_get_plane_sizes_ubwc()
629 layout->plane_size[0] = MSM_MEDIA_ALIGN(layout->plane_pitch[0] * in _dpu_format_get_plane_sizes_ubwc()
[all …]
/kernel/linux/linux-5.10/drivers/gpio/
Dgpio-creg-snps.c27 const struct creg_layout *layout; member
33 const struct creg_layout *layout = hcg->layout; in creg_gpio_set() local
38 value = val ? hcg->layout->on[offset] : hcg->layout->off[offset]; in creg_gpio_set()
40 reg_shift = layout->shift[offset]; in creg_gpio_set()
42 reg_shift += layout->bit_per_gpio[i] + layout->shift[i]; in creg_gpio_set()
46 reg &= ~(GENMASK(layout->bit_per_gpio[i] - 1, 0) << reg_shift); in creg_gpio_set()
62 const struct creg_layout *layout = hcg->layout; in creg_gpio_validate_pg() local
64 if (layout->bit_per_gpio[i] < 1 || layout->bit_per_gpio[i] > 8) in creg_gpio_validate_pg()
68 if (GENMASK(31, layout->bit_per_gpio[i]) & layout->on[i]) in creg_gpio_validate_pg()
72 if (GENMASK(31, layout->bit_per_gpio[i]) & layout->off[i]) in creg_gpio_validate_pg()
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/kernel/linux/linux-5.10/include/linux/mfd/syscon/
Datmel-smc.h19 #define ATMEL_HSMC_SETUP(layout, cs) \ argument
20 ((layout)->timing_regs_offset + ((cs) * 0x14))
22 #define ATMEL_HSMC_PULSE(layout, cs) \ argument
23 ((layout)->timing_regs_offset + ((cs) * 0x14) + 0x4)
25 #define ATMEL_HSMC_CYCLE(layout, cs) \ argument
26 ((layout)->timing_regs_offset + ((cs) * 0x14) + 0x8)
33 #define ATMEL_HSMC_MODE(layout, cs) \ argument
34 ((layout)->timing_regs_offset + ((cs) * 0x14) + 0x10)
64 #define ATMEL_HSMC_TIMINGS(layout, cs) \ argument
65 ((layout)->timing_regs_offset + ((cs) * 0x14) + 0xc)
/kernel/linux/linux-5.10/drivers/mfd/
Datmel-smc.c266 const struct atmel_hsmc_reg_layout *layout, in atmel_hsmc_cs_conf_apply() argument
269 regmap_write(regmap, ATMEL_HSMC_SETUP(layout, cs), conf->setup); in atmel_hsmc_cs_conf_apply()
270 regmap_write(regmap, ATMEL_HSMC_PULSE(layout, cs), conf->pulse); in atmel_hsmc_cs_conf_apply()
271 regmap_write(regmap, ATMEL_HSMC_CYCLE(layout, cs), conf->cycle); in atmel_hsmc_cs_conf_apply()
272 regmap_write(regmap, ATMEL_HSMC_TIMINGS(layout, cs), conf->timings); in atmel_hsmc_cs_conf_apply()
273 regmap_write(regmap, ATMEL_HSMC_MODE(layout, cs), conf->mode); in atmel_hsmc_cs_conf_apply()
307 const struct atmel_hsmc_reg_layout *layout, in atmel_hsmc_cs_conf_get() argument
310 regmap_read(regmap, ATMEL_HSMC_SETUP(layout, cs), &conf->setup); in atmel_hsmc_cs_conf_get()
311 regmap_read(regmap, ATMEL_HSMC_PULSE(layout, cs), &conf->pulse); in atmel_hsmc_cs_conf_get()
312 regmap_read(regmap, ATMEL_HSMC_CYCLE(layout, cs), &conf->cycle); in atmel_hsmc_cs_conf_get()
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/kernel/linux/linux-5.10/Documentation/filesystems/nfs/
Dpnfs.rst17 Each nfs_inode may hold a pointer to a cache of these layout
18 segments in nfsi->layout, of type struct pnfs_layout_hdr.
26 the reference count, as the layout is kept around by the lseg that
33 layout driver type. The device ids are held in a RCU cache (struct
62 layout drivers
65 PNFS utilizes what is called layout drivers. The STD defines 4 basic
66 layout types: "files", "objects", "blocks", and "flexfiles". For each
67 of these types there is a layout-driver with a common function-vectors
69 different layout types.
71 Files-layout-driver code is in: fs/nfs/filelayout/.. directory
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/kernel/linux/linux-5.10/drivers/gpu/drm/atmel-hlcdc/
Datmel_hlcdc_plane.c289 if (!desc->layout.scaler_config) in atmel_hlcdc_plane_setup_scaler()
294 desc->layout.scaler_config, 0); in atmel_hlcdc_plane_setup_scaler()
298 if (desc->layout.phicoeffs.x) { in atmel_hlcdc_plane_setup_scaler()
312 desc->layout.phicoeffs.x); in atmel_hlcdc_plane_setup_scaler()
319 desc->layout.phicoeffs.y); in atmel_hlcdc_plane_setup_scaler()
325 atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.scaler_config, in atmel_hlcdc_plane_setup_scaler()
337 if (desc->layout.size) in atmel_hlcdc_plane_update_pos_and_size()
338 atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.size, in atmel_hlcdc_plane_update_pos_and_size()
342 if (desc->layout.memsize) in atmel_hlcdc_plane_update_pos_and_size()
344 desc->layout.memsize, in atmel_hlcdc_plane_update_pos_and_size()
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Datmel_hlcdc_dc.c41 .layout = {
71 .layout = {
87 .layout = {
106 .layout = {
130 .layout = {
164 .layout = {
180 .layout = {
199 .layout = {
218 .layout = {
246 .layout = {
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/kernel/linux/linux-5.10/drivers/md/
Draid5.h763 static inline int algorithm_valid_raid5(int layout) in algorithm_valid_raid5() argument
765 return (layout >= 0) && in algorithm_valid_raid5()
766 (layout <= 5); in algorithm_valid_raid5()
768 static inline int algorithm_valid_raid6(int layout) in algorithm_valid_raid6() argument
770 return (layout >= 0 && layout <= 5) in algorithm_valid_raid6()
772 (layout >= 8 && layout <= 10) in algorithm_valid_raid6()
774 (layout >= 16 && layout <= 20); in algorithm_valid_raid6()
777 static inline int algorithm_is_DDF(int layout) in algorithm_is_DDF() argument
779 return layout >= 8 && layout <= 10; in algorithm_is_DDF()
Ddm-raid.c429 static bool __is_raid10_far(int layout);
528 static unsigned int __raid10_near_copies(int layout) in __raid10_near_copies() argument
530 return layout & 0xFF; in __raid10_near_copies()
534 static unsigned int __raid10_far_copies(int layout) in __raid10_far_copies() argument
536 return __raid10_near_copies(layout >> RAID10_FAR_COPIES_SHIFT); in __raid10_far_copies()
540 static bool __is_raid10_offset(int layout) in __is_raid10_offset() argument
542 return !!(layout & RAID10_OFFSET); in __is_raid10_offset()
546 static bool __is_raid10_near(int layout) in __is_raid10_near() argument
548 return !__is_raid10_offset(layout) && __raid10_near_copies(layout) > 1; in __is_raid10_near()
552 static bool __is_raid10_far(int layout) in __is_raid10_far() argument
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/kernel/linux/linux-5.10/sound/aoa/fabrics/
Dlayout.c62 struct layout { struct
271 static struct layout layouts[] = {
562 static struct layout *find_layout_by_id(unsigned int id) in find_layout_by_id()
564 struct layout *l; in find_layout_by_id()
575 static struct layout *find_layout_by_device(unsigned int id) in find_layout_by_device()
577 struct layout *l; in find_layout_by_device()
588 static void use_layout(struct layout *l) in use_layout()
611 struct layout *layout; member
825 if (!ldev->layout->codecs[i].name) in layout_found_codec()
827 if (strcmp(ldev->layout->codecs[i].name, codec->name) == 0) { in layout_found_codec()
[all …]
DMakefile2 snd-aoa-fabric-layout-objs += layout.o
4 obj-$(CONFIG_SND_AOA_FABRIC_LAYOUT) += snd-aoa-fabric-layout.o
DKconfig3 tristate "layout-id fabric"
7 This enables the layout-id fabric for the Apple Onboard
9 based on the device-tree's layout-id property.
/kernel/linux/linux-5.10/drivers/staging/comedi/drivers/
Dcb_pcidas64.c636 enum register_layout layout; member
670 if (board->layout == LAYOUT_4020) in ai_dma_ring_count()
687 .layout = LAYOUT_64XX,
703 .layout = LAYOUT_64XX,
719 .layout = LAYOUT_64XX,
735 .layout = LAYOUT_64XX,
751 .layout = LAYOUT_64XX,
766 .layout = LAYOUT_60XX,
782 .layout = LAYOUT_60XX,
797 .layout = LAYOUT_60XX,
[all …]
/kernel/linux/linux-5.10/fs/ceph/
Dutil.c11 int ceph_file_layout_is_valid(const struct ceph_file_layout *layout) in ceph_file_layout_is_valid() argument
13 __u32 su = layout->stripe_unit; in ceph_file_layout_is_valid()
14 __u32 sc = layout->stripe_count; in ceph_file_layout_is_valid()
15 __u32 os = layout->object_size; in ceph_file_layout_is_valid()
Dioctl.c117 req->r_args.setlayout.layout.fl_stripe_unit = in ceph_ioctl_set_layout()
119 req->r_args.setlayout.layout.fl_stripe_count = in ceph_ioctl_set_layout()
121 req->r_args.setlayout.layout.fl_object_size = in ceph_ioctl_set_layout()
123 req->r_args.setlayout.layout.fl_pg_pool = cpu_to_le32(l.data_pool); in ceph_ioctl_set_layout()
161 req->r_args.setlayout.layout.fl_stripe_unit = in ceph_ioctl_set_layout_policy()
163 req->r_args.setlayout.layout.fl_stripe_count = in ceph_ioctl_set_layout_policy()
165 req->r_args.setlayout.layout.fl_object_size = in ceph_ioctl_set_layout_policy()
167 req->r_args.setlayout.layout.fl_pg_pool = in ceph_ioctl_set_layout_policy()
/kernel/linux/linux-5.10/drivers/input/keyboard/
Dsunkbd.c70 volatile s8 layout; member
93 if (sunkbd->layout == -1) { in sunkbd_interrupt()
94 sunkbd->layout = data; in sunkbd_interrupt()
108 sunkbd->layout = -1; in sunkbd_interrupt()
190 sunkbd->layout = -2; in sunkbd_initialize()
193 sunkbd->layout >= 0, HZ / 4); in sunkbd_initialize()
194 if (sunkbd->layout < 0) in sunkbd_initialize()
196 if (sunkbd->layout & SUNKBD_LAYOUT_5_MASK) in sunkbd_initialize()
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/dispnv50/
Dhead917d.c91 NVVAL(NV917D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) | in head917d_curs_set()
107 case 32: asyh->curs.layout = NV917D_HEAD_SET_CONTROL_CURSOR_SIZE_W32_H32; break; in head917d_curs_layout()
108 case 64: asyh->curs.layout = NV917D_HEAD_SET_CONTROL_CURSOR_SIZE_W64_H64; break; in head917d_curs_layout()
109 case 128: asyh->curs.layout = NV917D_HEAD_SET_CONTROL_CURSOR_SIZE_W128_H128; break; in head917d_curs_layout()
110 case 256: asyh->curs.layout = NV917D_HEAD_SET_CONTROL_CURSOR_SIZE_W256_H256; break; in head917d_curs_layout()
/kernel/linux/linux-5.10/Documentation/userspace-api/media/v4l/
Dpixfmt-nv12mt.rst12 memory layout. Pixels are grouped in macroblocks of 64x32 size. The
40 V4L2_PIX_FMT_NV12MT macroblock Z shape memory layout
47 In case of chroma the layout is identical. Cb and Cr samples are
57 Example V4L2_PIX_FMT_NV12MT memory layout of macroblocks
59 Memory layout of macroblocks of ``V4L2_PIX_FMT_NV12MT`` format in most

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