/third_party/node/deps/v8/src/compiler/backend/mips/ |
D | instruction-scheduler-mips.cc | 397 BRANCH = 4, // Estimated max. enumerator 529 return (6 + 2 * Latency::BRANCH); in ClzLatency() 608 return latency + Latency::BRANCH + 2; in ShlPairLatency() 622 return latency + Latency::BRANCH + 2; in ShrPairLatency() 636 Latency::BRANCH + 6; in SarPairLatency() 760 return Mfhc1Latency() + ExtLatency() + Latency::BRANCH + Latency::MOV_D + in Float64RoundLatency() 761 4 + MoveLatency() + 1 + Latency::BRANCH + Latency::CVT_D_L; in Float64RoundLatency() 770 return Latency::MFC1 + ExtLatency() + Latency::BRANCH + Latency::MOV_S + 4 + in Float32RoundLatency() 771 Latency::MFC1 + Latency::BRANCH + Latency::CVT_S_W; in Float32RoundLatency() 779 return Latency::BRANCH + Latency::MTC1 + 1 + Latency::MTC1 + in CvtDUwLatency() [all …]
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/third_party/node/deps/v8/src/compiler/backend/riscv64/ |
D | instruction-scheduler-riscv64.cc | 428 BRANCH = 4, // Estimated max. enumerator 693 return Add64Latency(false) + Latency::BRANCH + 5; in CallLatency() 698 return 1 + Add64Latency() + Latency::BRANCH + 2; in JumpLatency() 705 return 2 * (Add64Latency() + 1 + Add64Latency(false)) + 2 + Latency::BRANCH + in PrepareForTailCallLatency() 706 Latency::BRANCH + 2 * Sub64Latency(false) + 2 + Latency::BRANCH + 1; in PrepareForTailCallLatency() 710 return 1 + Latency::BRANCH + 1 + SmiUntagLatency() + in AssemblePopArgumentsAdoptFrameLatency() 830 int latency = AndLatency(false) + Latency::BRANCH + 2 + CallLatency(); in CallCFunctionHelperLatency() 843 return Latency::BRANCH; in AssembleArchJumpLatency() 853 return Latency::BRANCH + GenerateSwitchTableLatency(); in AssembleArchTableSwitchLatency() 864 Latency::BRANCH + Add64Latency() + 1 + DropAndRetLatency(); in AssemblerReturnLatency() [all …]
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/third_party/node/deps/v8/src/compiler/backend/mips64/ |
D | instruction-scheduler-mips64.cc | 422 BRANCH = 4, // Estimated max. enumerator 738 return Latency::BRANCH + 1; in MovzLatency() 746 return Latency::BRANCH + 1; in MovnLatency() 759 return DadduLatency(false) + Latency::BRANCH + 5; in CallLatency() 764 return 1 + DadduLatency() + Latency::BRANCH + 2; in JumpLatency() 771 return 2 * (DlsaLatency() + DadduLatency(false)) + 2 + Latency::BRANCH + in PrepareForTailCallLatency() 772 Latency::BRANCH + 2 * DsubuLatency(false) + 2 + Latency::BRANCH + 1; in PrepareForTailCallLatency() 941 int latency = AndLatency(false) + Latency::BRANCH + 2 + CallLatency(); in CallCFunctionHelperLatency() 954 return Latency::BRANCH; in AssembleArchJumpLatency() 969 return Latency::BRANCH + GenerateSwitchTableLatency(); in AssembleArchTableSwitchLatency() [all …]
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/third_party/node/tools/ |
D | update-llhttp.sh | 30 BRANCH=$2 31 [ -z "$BRANCH" ] && BRANCH=main 36 echo "Checking out branch $BRANCH ..." 37 git checkout "$BRANCH"
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/third_party/node/tools/dep_updaters/ |
D | update-llhttp.sh | 49 BRANCH=$2 50 [ -z "$BRANCH" ] && BRANCH=main 55 echo "Checking out branch $BRANCH ..." 56 git checkout "$BRANCH"
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/third_party/mesa3d/src/panfrost/bifrost/valhall/test/ |
D | negative-cases.txt | 3 BRANCH 4 BRANCH #0 5 BRANCH #0, offset: 6 BRANCH u0, offset:-123456789 7 BRANCH u0, offset:123456789
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/third_party/libsnd/ossfuzz/ |
D | ci_oss.sh | 20 BRANCH=${GITHUB_REF} 23 …dfile.git /src/libsndfile \&\& cd /src/libsndfile \&\& git checkout -b ${BRANCH}@" /tmp/ossfuzz/pr…
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/third_party/skia/infra/bots/assets/clang_linux/ |
D | create.py | 18 BRANCH = "release/10.x" variable 27 subprocess.check_call(["git", "clone", "--depth", "1", "-b", BRANCH,
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/third_party/mesa3d/src/gallium/drivers/v3d/ |
D | v3d_cl.c | 66 if (cl_offset(cl) + space + cl_packet_length(BRANCH) <= cl->size) in v3d_cl_ensure_space_with_branch() 74 cl_emit(cl, BRANCH, branch) { in v3d_cl_ensure_space_with_branch()
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/third_party/mesa3d/src/broadcom/vulkan/ |
D | v3dv_cl.c | 79 cl_emit(cl, BRANCH, branch) { in cl_alloc_bo() 123 space += cl_packet_length(BRANCH); in v3dv_cl_ensure_space_with_branch()
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/third_party/python/Lib/ |
D | re.py | 348 from sre_constants import BRANCH, SUBPATTERN 362 p = sre_parse.SubPattern(s, [(BRANCH, (None, p))])
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D | sre_compile.py | 202 elif op is BRANCH: 509 elif op is BRANCH: 699 elif op is BRANCH:
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D | sre_parse.py | 128 elif op is BRANCH: 180 if op is BRANCH: 490 subpattern.append((BRANCH, (None, items)))
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/third_party/libphonenumber/metadata/src/main/java/com/google/i18n/phonenumbers/metadata/finitestatematcher/compiler/ |
D | Operation.java | 160 out.writeByte((OpCode.BRANCH.ordinal() << 5) | jump); in writeBranch() 163 out.writeShort((OpCode.BRANCH.ordinal() << 13) | (1 << 12) | jump); in writeBranch() 221 return OpCode.BRANCH;
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/third_party/libphonenumber/metadata/src/main/java/com/google/i18n/phonenumbers/metadata/finitestatematcher/ |
D | OpCode.java | 63 BRANCH(0) { enumConstant
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/third_party/node/deps/v8/src/codegen/riscv64/ |
D | constants-riscv64.cc | 227 case BRANCH: in InstructionType()
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D | constants-riscv64.h | 397 BRANCH = 0b1100011, // B form: BEQ BNE, BLT, BGE, BLTU BGEU enumerator 416 RO_BEQ = BRANCH | (0b000 << kFunct3Shift), 417 RO_BNE = BRANCH | (0b001 << kFunct3Shift), 418 RO_BLT = BRANCH | (0b100 << kFunct3Shift), 419 RO_BGE = BRANCH | (0b101 << kFunct3Shift), 420 RO_BLTU = BRANCH | (0b110 << kFunct3Shift), 421 RO_BGEU = BRANCH | (0b111 << kFunct3Shift),
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/third_party/mesa3d/src/gallium/drivers/nouveau/nv50/ |
D | nv50_query_hw_metric.c | 45 .queries[0] = _SM(BRANCH),
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D | nv50_query_hw_sm.c | 119 _Q(BRANCH, LOGOP, UNK4, 0x02),
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/third_party/elfutils/backends/ |
D | riscv_reloc.def | 42 RELOC_TYPE (BRANCH, REL)
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
D | README.txt | 35 We don't use the BRANCH ON INDEX instructions.
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/third_party/mesa3d/src/gallium/drivers/etnaviv/ |
D | etnaviv_disasm.c | 485 OPC_IMM(BRANCH),
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/third_party/libuv/ |
D | CONTRIBUTING.md | 33 ### BRANCH subsection in CONTRIBUTING
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/third_party/node/deps/uv/ |
D | CONTRIBUTING.md | 33 ### BRANCH subsection in CONTRIBUTING
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/third_party/mesa3d/src/gallium/drivers/nouveau/nvc0/ |
D | nvc0_query_hw_metric.c | 138 .queries[0] = _SM(BRANCH),
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