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Searched refs:ADDR_SW_VAR_Z_X (Results 1 – 3 of 3) sorted by relevance

/third_party/mesa3d/src/amd/addrlib/src/gfx10/
Dgfx10addrlib.h97 const UINT_32 Gfx10BlkVarSwModeMask = (1u << ADDR_SW_VAR_Z_X) |
101 (1u << ADDR_SW_VAR_Z_X);
Dgfx10addrlib.cpp168 ((pIn->swizzleMode != ADDR_SW_VAR_Z_X) || (m_blockVarSizeLog2 == 0))) || in HwlComputeHtileInfo()
288 ((pIn->swizzleMode != ADDR_SW_VAR_Z_X) || (m_blockVarSizeLog2 == 0)))) in HwlComputeCmaskInfo()
377 (pIn->swizzleMode == ADDR_SW_VAR_Z_X) ? GFX10_CMASK_VAR_RBPLUS_PATIDX : in HwlComputeCmaskInfo()
610 (pIn->swizzleMode == ADDR_SW_VAR_Z_X) ? GFX10_CMASK_VAR_RBPLUS_PATIDX : in HwlComputeCmaskAddrFromCoord()
2819 … AddrSwizzleMode swMode[maxFmaskSwizzleModeType] = {ADDR_SW_64KB_Z_X, ADDR_SW_VAR_Z_X}; in HwlGetPreferredSurfaceSetting()
2859 pOut->swizzleMode = ADDR_SW_VAR_Z_X; in HwlGetPreferredSurfaceSetting()
4580 m_blockVarSizeLog2 ? ADDR_SW_VAR_Z_X : ADDR_SW_64KB_Z_X, in HwlComputeMaxMetaBaseAlignments()
/third_party/mesa3d/src/amd/addrlib/inc/
Daddrtypes.h286 ADDR_SW_VAR_Z_X = ADDR_SW_MISCDEF28, enumerator