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Searched refs:AddrMode (Results 1 – 25 of 81) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DThumb2InstrInfo.cpp479 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in rewriteT2FrameIndex() local
488 AddrMode = ARMII::AddrModeT2_i12; // FIXME. mode for thumb2? in rewriteT2FrameIndex()
559 if (AddrMode == ARMII::AddrMode4 || AddrMode == ARMII::AddrMode6) in rewriteT2FrameIndex()
565 if (AddrMode == ARMII::AddrModeT2_so) { in rewriteT2FrameIndex()
575 AddrMode = ARMII::AddrModeT2_i12; in rewriteT2FrameIndex()
580 if (AddrMode == ARMII::AddrModeT2_i8 || AddrMode == ARMII::AddrModeT2_i12) { in rewriteT2FrameIndex()
594 } else if (AddrMode == ARMII::AddrMode5) { in rewriteT2FrameIndex()
608 } else if (AddrMode == ARMII::AddrMode5FP16) { in rewriteT2FrameIndex()
622 } else if (AddrMode == ARMII::AddrModeT2_i7s4 || in rewriteT2FrameIndex()
623 AddrMode == ARMII::AddrModeT2_i7s2 || in rewriteT2FrameIndex()
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DARMInstrFormats.td90 class AddrMode<bits<5> val> {
93 def AddrModeNone : AddrMode<0>;
94 def AddrMode1 : AddrMode<1>;
95 def AddrMode2 : AddrMode<2>;
96 def AddrMode3 : AddrMode<3>;
97 def AddrMode4 : AddrMode<4>;
98 def AddrMode5 : AddrMode<5>;
99 def AddrMode6 : AddrMode<6>;
100 def AddrModeT1_1 : AddrMode<7>;
101 def AddrModeT1_2 : AddrMode<8>;
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DARMBaseRegisterInfo.cpp500 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in getFrameIndexInstrOffset() local
504 switch (AddrMode) { in getFrameIndexInstrOffset()
686 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in isFrameOffsetLegal() local
692 if (AddrMode == ARMII::AddrMode4 || AddrMode == ARMII::AddrMode6) in isFrameOffsetLegal()
698 switch (AddrMode) { in isFrameOffsetLegal()
DARMISelLowering.h369 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM,
377 int getScalingFactorCost(const DataLayout &DL, const AddrMode &AM, Type *Ty,
380 bool isLegalT2ScaledAddressingMode(const AddrMode &AM, EVT VT) const;
384 bool isLegalT1ScaledAddressingMode(const AddrMode &AM, EVT VT) const;
DARMInstrNEON.td623 class VLD1D<bits<4> op7_4, string Dt, Operand AddrMode>
625 (ins AddrMode:$Rn), IIC_VLD1,
631 class VLD1Q<bits<4> op7_4, string Dt, Operand AddrMode>
633 (ins AddrMode:$Rn), IIC_VLD1x2,
651 multiclass VLD1DWB<bits<4> op7_4, string Dt, Operand AddrMode> {
653 (ins AddrMode:$Rn), IIC_VLD1u,
661 (ins AddrMode:$Rn, rGPR:$Rm), IIC_VLD1u,
668 multiclass VLD1QWB<bits<4> op7_4, string Dt, Operand AddrMode> {
670 (ins AddrMode:$Rn), IIC_VLD1x2u,
678 (ins AddrMode:$Rn, rGPR:$Rm), IIC_VLD1x2u,
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DThumbRegisterInfo.cpp371 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in rewriteFrameIndex() local
382 if (AddrMode != ARMII::AddrModeT1_s) in rewriteFrameIndex()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DCodeGenPrepare.cpp2179 struct ExtAddrMode : public TargetLowering::AddrMode {
2865 ExtAddrMode &AddrMode; member in __anone2ed542f0711::AddressingModeMatcher
2898 MemoryInst(MI), AddrMode(AM), InsertedInsts(InsertedInsts), in AddressingModeMatcher()
3606 if (AddrMode.Scale != 0 && AddrMode.ScaledReg != ScaleReg) in matchScaledValue()
3609 ExtAddrMode TestAddrMode = AddrMode; in matchScaledValue()
3621 AddrMode = TestAddrMode; in matchScaledValue()
3637 AddrMode = TestAddrMode; in matchScaledValue()
4193 ExtAddrMode BackupAddrMode = AddrMode; in matchOperationAddr()
4202 AddrMode.InBounds = false; in matchOperationAddr()
4208 AddrMode = BackupAddrMode; in matchOperationAddr()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/Disassembler/
DMSP430Disassembler.cpp142 enum AddrMode { enum
154 static AddrMode DecodeSrcAddrMode(unsigned Rs, unsigned As) { in DecodeSrcAddrMode()
181 static AddrMode DecodeSrcAddrModeI(unsigned Insn) { in DecodeSrcAddrModeI()
187 static AddrMode DecodeSrcAddrModeII(unsigned Insn) { in DecodeSrcAddrModeII()
193 static AddrMode DecodeDstAddrMode(unsigned Insn) { in DecodeDstAddrMode()
205 static const uint8_t *getDecoderTable(AddrMode SrcAM, unsigned Words) { in getDecoderTable()
234 AddrMode SrcAM = DecodeSrcAddrModeI(Insn); in getInstructionI()
235 AddrMode DstAM = DecodeDstAddrMode(Insn); in getInstructionI()
289 AddrMode SrcAM = DecodeSrcAddrModeII(Insn); in getInstructionII()
/third_party/vixl/src/aarch32/
Doperands-aarch32.h637 explicit MemOperand(Register rn, AddrMode addrmode = Offset)
654 MemOperand(Register rn, int32_t offset, AddrMode addrmode = Offset)
664 MemOperand(Register rn, Sign sign, int32_t offset, AddrMode addrmode = Offset)
681 MemOperand(Register rn, Sign sign, Register rm, AddrMode addrmode = Offset)
695 MemOperand(Register rn, Register rm, AddrMode addrmode = Offset)
715 AddrMode addrmode = Offset)
731 MemOperand(Register rn, Register rm, Shift shift, AddrMode addrmode = Offset)
754 AddrMode addrmode = Offset)
775 AddrMode addrmode = Offset)
799 AddrMode GetAddrMode() const { in GetAddrMode()
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Dmacro-assembler-aarch32.cc317 AddrMode addrmode) { in GetOffsetMask()
1733 AddrMode addrmode = operand.GetAddrMode(); in Delegate()
1818 AddrMode addrmode = operand.GetAddrMode(); in Delegate()
1955 AddrMode addrmode = operand.GetAddrMode(); in Delegate()
2046 AddrMode addrmode = operand.GetAddrMode(); in Delegate()
2123 AddrMode addrmode = operand.GetAddrMode(); in Delegate()
2196 AddrMode addrmode = operand.GetAddrMode(); in Delegate()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/
DARMBaseInfo.h185 enum AddrMode { enum
210 inline static const char *AddrModeToString(AddrMode addrmode) { in AddrModeToString()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIISelLowering.h184 bool isLegalFlatAddressingMode(const AddrMode &AM) const;
185 bool isLegalMUBUFAddressingMode(const AddrMode &AM) const;
238 bool isLegalGlobalAddressingMode(const AddrMode &AM) const;
239 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
/third_party/vixl/src/aarch64/
Doperands-aarch64.h396 AddrMode addrmode = Offset);
405 MemOperand(Register base, const Operand& offset, AddrMode addrmode = Offset);
417 AddrMode GetAddrMode() const { return addrmode_; } in GetAddrMode()
471 AddrMode addrmode_;
Doperands-aarch64.cc236 MemOperand::MemOperand(Register base, int64_t offset, AddrMode addrmode) in MemOperand()
285 MemOperand::MemOperand(Register base, const Operand& offset, AddrMode addrmode) in MemOperand()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonBaseInfo.h35 enum AddrMode { enum
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/
DARCISelLowering.h73 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
DARCInstrFormats.td70 class AddrMode<bits<2> mode, string instSfx, string asmSfx> {
89 def NoAM : AddrMode<0b00, "", "">;
90 def PreIncAM : AddrMode<0b01, "_AW", ".aw">;
91 def PostIncAM : AddrMode<0b10, "_AB", ".ab">;
109 AddrMode AA = NoAM;
/third_party/node/deps/v8/src/codegen/arm/
Dassembler-arm.h197 explicit MemOperand(Register rn, int32_t offset = 0, AddrMode am = Offset);
202 explicit MemOperand(Register rn, Register rm, AddrMode am = Offset);
208 AddrMode am = Offset);
211 AddrMode am = Offset) {
228 AddrMode am() const { return am_; } in am()
240 AddrMode am_; // bits P, U, and W
251 explicit NeonMemOperand(Register rn, AddrMode am = Offset, int align = 0);
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyISelLowering.h67 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/
DIceInstARM32.h88 enum AddrMode { enum
107 AddrMode Mode = Offset) {
115 AddrMode Mode = Offset) {
124 AddrMode getAddrMode() const { return Mode; } in getAddrMode()
152 ConstantInteger32 *ImmOffset, AddrMode Mode);
154 ShiftKind ShiftOp, uint16_t ShiftAmt, AddrMode Mode);
161 AddrMode Mode;
DIceInstMIPS32.h121 enum AddrMode { Offset }; enum
130 Operand *ImmOffset, AddrMode Mode = Offset) {
137 AddrMode getAddrMode() const { return Mode; } in getAddrMode()
172 AddrMode Mode);
176 const AddrMode Mode;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
DAVRISelLowering.h91 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/
DXCoreISelLowering.h124 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVISelLowering.h68 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
/third_party/node/deps/v8/src/execution/arm64/
Dsimulator-arm64.h1494 void LoadStoreHelper(Instruction* instr, int64_t offset, AddrMode addrmode);
1495 void LoadStorePairHelper(Instruction* instr, AddrMode addrmode);
1497 AddrMode addrmode);
1498 void LoadStoreWriteBack(unsigned addr_reg, int64_t offset, AddrMode addrmode);
1500 AddrMode addr_mode);
1502 AddrMode addr_mode);

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