/third_party/mesa3d/src/compiler/ |
D | shader_enums.h | 474 #define VARYING_BIT_POS BITFIELD64_BIT(VARYING_SLOT_POS) 475 #define VARYING_BIT_COL0 BITFIELD64_BIT(VARYING_SLOT_COL0) 476 #define VARYING_BIT_COL1 BITFIELD64_BIT(VARYING_SLOT_COL1) 477 #define VARYING_BIT_FOGC BITFIELD64_BIT(VARYING_SLOT_FOGC) 478 #define VARYING_BIT_TEX0 BITFIELD64_BIT(VARYING_SLOT_TEX0) 479 #define VARYING_BIT_TEX1 BITFIELD64_BIT(VARYING_SLOT_TEX1) 480 #define VARYING_BIT_TEX2 BITFIELD64_BIT(VARYING_SLOT_TEX2) 481 #define VARYING_BIT_TEX3 BITFIELD64_BIT(VARYING_SLOT_TEX3) 482 #define VARYING_BIT_TEX4 BITFIELD64_BIT(VARYING_SLOT_TEX4) 483 #define VARYING_BIT_TEX5 BITFIELD64_BIT(VARYING_SLOT_TEX5) [all …]
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/third_party/mesa3d/src/intel/compiler/ |
D | brw_vue_map.c | 82 slots_valid |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0); in brw_compute_vue_map() 83 slots_valid |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1); in brw_compute_vue_map() 149 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0)) in brw_compute_vue_map() 151 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1)) in brw_compute_vue_map() 163 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_COL0)) in brw_compute_vue_map() 165 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_BFC0)) in brw_compute_vue_map() 167 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_COL1)) in brw_compute_vue_map() 169 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_BFC1)) in brw_compute_vue_map() 194 builtins &= ~BITFIELD64_BIT(varying); in brw_compute_vue_map() 205 generics &= ~BITFIELD64_BIT(varying); in brw_compute_vue_map() [all …]
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D | brw_nir_lower_alpha_to_coverage.c | 87 if (!(outputs_written & BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK)) || in brw_nir_lower_alpha_to_coverage() 88 !(outputs_written & (BITFIELD64_BIT(FRAG_RESULT_COLOR) | in brw_nir_lower_alpha_to_coverage() 89 BITFIELD64_BIT(FRAG_RESULT_DATA0)))) in brw_nir_lower_alpha_to_coverage()
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D | brw_mesh.cpp | 365 if (BITFIELD64_BIT(VARYING_SLOT_PRIMITIVE_COUNT) & outputs_written) { in brw_compute_mue_map() 367 outputs_written &= ~BITFIELD64_BIT(VARYING_SLOT_PRIMITIVE_COUNT); in brw_compute_mue_map() 369 if (BITFIELD64_BIT(VARYING_SLOT_PRIMITIVE_INDICES) & outputs_written) { in brw_compute_mue_map() 371 outputs_written &= ~BITFIELD64_BIT(VARYING_SLOT_PRIMITIVE_INDICES); in brw_compute_mue_map() 381 (nir->info.outputs_written & (BITFIELD64_BIT(VARYING_SLOT_VIEWPORT) | in brw_compute_mue_map() 382 BITFIELD64_BIT(VARYING_SLOT_CULL_PRIMITIVE) | in brw_compute_mue_map() 383 BITFIELD64_BIT(VARYING_SLOT_PRIMITIVE_SHADING_RATE) | in brw_compute_mue_map() 384 BITFIELD64_BIT(VARYING_SLOT_LAYER))) ? 8 : 0; in brw_compute_mue_map()
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D | brw_fs_visitor.cpp | 122 assert(BITFIELD64_BIT(location) & ~nir->info.per_primitive_inputs); in interp_reg() 147 assert(BITFIELD64_BIT(location) & nir->info.per_primitive_inputs); in per_primitive_reg() 628 if (nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) { in emit_single_fb_write() 642 if (nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL)) in emit_single_fb_write() 681 if (nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL)) { in emit_fb_writes()
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D | brw_clip.h | 108 return (c->key.attrs & BITFIELD64_BIT(varying)) ? 1 : 0; in brw_clip_have_varying()
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/third_party/mesa3d/src/compiler/nir/ |
D | nir_lower_fragcolor.c | 82 b->shader->info.outputs_written &= ~BITFIELD64_BIT(FRAG_RESULT_COLOR); in lower_fragcolor_instr() 83 b->shader->info.outputs_written |= BITFIELD64_BIT(FRAG_RESULT_DATA0); in lower_fragcolor_instr() 94 b->shader->info.outputs_written |= BITFIELD64_BIT(FRAG_RESULT_DATA0 + i); in lower_fragcolor_instr()
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D | nir_gather_info.c | 115 bitfield = BITFIELD64_BIT(idx - VARYING_SLOT_PATCH0); in set_io_mask() 122 bitfield = BITFIELD64_BIT(idx); in set_io_mask() 546 shader->info.vs.double_inputs |= BITFIELD64_BIT(idx); in gather_intrinsic_info() 656 BITFIELD64_BIT(VARYING_SLOT_COL0 << in gather_intrinsic_info()
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D | nir_lower_texcoord_replace.c | 85 b.shader->info.inputs_read |= BITFIELD64_BIT(VARYING_SLOT_PNTC); in nir_lower_texcoord_replace_impl()
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/third_party/mesa3d/src/mesa/state_tracker/ |
D | st_util.h | 82 BITFIELD64_BIT(VARYING_SLOT_PSIZ)) { in st_point_size_per_vertex() 103 BITFIELD64_BIT(VARYING_SLOT_PSIZ)); in st_point_size_per_vertex()
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D | st_atifs_to_nir.c | 550 prog->info.outputs_written = BITFIELD64_BIT(FRAG_RESULT_COLOR); in st_init_atifs_prog() 562 … prog->info.inputs_read |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + pass_tex - GL_TEXTURE0_ARB); in st_init_atifs_prog() 569 … prog->info.inputs_read |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + pass_tex - GL_TEXTURE0_ARB); in st_init_atifs_prog() 583 prog->info.inputs_read |= BITFIELD64_BIT(VARYING_SLOT_COL0); in st_init_atifs_prog() 588 prog->info.inputs_read |= BITFIELD64_BIT(VARYING_SLOT_COL1); in st_init_atifs_prog() 596 prog->info.inputs_read |= BITFIELD64_BIT(VARYING_SLOT_FOGC); in st_init_atifs_prog()
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D | st_atom_shader.c | 99 gl_clamp[0] |= BITFIELD64_BIT(unit); in update_gl_clamp() 101 gl_clamp[1] |= BITFIELD64_BIT(unit); in update_gl_clamp() 103 gl_clamp[2] |= BITFIELD64_BIT(unit); in update_gl_clamp()
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/third_party/mesa3d/src/panfrost/bifrost/ |
D | bi_validate.c | 93 if (preloaded & BITFIELD64_BIT(r)) in bi_validate_preload() 96 preloaded |= BITFIELD64_BIT(r); in bi_validate_preload()
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D | bi_ra.c | 320 uint64_t clobber = BITFIELD64_MASK(16) | BITFIELD64_BIT(48); in bi_mark_interference() 442 affinity |= BITFIELD64_BIT(48); in bi_allocate_registers() 443 affinity |= BITFIELD64_BIT(60); in bi_allocate_registers() 447 if (affinity & BITFIELD64_BIT(reg)) { in bi_allocate_registers()
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/third_party/mesa3d/src/imagination/vulkan/winsys/pvrsrvkm/ |
D | pvr_srv_bo.h | 66 #define PVR_SRV_MEMALLOCFLAG_VAL_SECURE_BUFFER BITFIELD64_BIT(34U) 67 #define PVR_SRV_MEMALLOCFLAG_VAL_SHARED_BUFFER BITFIELD64_BIT(35U)
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/third_party/mesa3d/src/gallium/drivers/radeonsi/ |
D | si_shader_info.c | 627 (BITFIELD64_BIT(VARYING_SLOT_TESS_LEVEL_INNER) | in si_nir_scan_shader() 628 BITFIELD64_BIT(VARYING_SLOT_TESS_LEVEL_OUTER)); in si_nir_scan_shader() 652 info->writes_z = nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH); in si_nir_scan_shader() 653 info->writes_stencil = nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL); in si_nir_scan_shader() 654 info->writes_samplemask = nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK); in si_nir_scan_shader() 657 if (nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_COLOR)) { in si_nir_scan_shader()
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D | si_build_pm4.h | 257 sctx->tracked_regs.reg_saved |= BITFIELD64_BIT(reg); \ 270 sctx->tracked_regs.reg_saved |= BITFIELD64_BIT(reg); \
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/third_party/mesa3d/src/panfrost/lib/ |
D | pan_shader.c | 246 if (s->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) in GENX() 248 if (s->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL)) in GENX() 250 if (s->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK)) in GENX()
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/third_party/mesa3d/src/amd/vulkan/ |
D | radv_shader_info.c | 510 uint64_t special_mask = BITFIELD64_BIT(VARYING_SLOT_PRIMITIVE_COUNT) | in radv_nir_shader_info_pass() 511 BITFIELD64_BIT(VARYING_SLOT_PRIMITIVE_INDICES) | in radv_nir_shader_info_pass() 512 BITFIELD64_BIT(VARYING_SLOT_CULL_PRIMITIVE); in radv_nir_shader_info_pass() 637 info->ps.writes_z = nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH); in radv_nir_shader_info_pass() 638 info->ps.writes_stencil = nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL); in radv_nir_shader_info_pass() 639 … info->ps.writes_sample_mask = nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK); in radv_nir_shader_info_pass()
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/third_party/mesa3d/src/mesa/vbo/ |
D | vbo_attrib.h | 111 BITFIELD64_BIT(VBO_ATTRIB_EDGEFLAG))
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/third_party/mesa3d/src/gallium/drivers/crocus/ |
D | crocus_program.c | 1122 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_EDGE); in crocus_vs_outputs_written() 1132 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + i); in crocus_vs_outputs_written() 1136 if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC0)) in crocus_vs_outputs_written() 1137 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_COL0); in crocus_vs_outputs_written() 1138 if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC1)) in crocus_vs_outputs_written() 1139 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_COL1); in crocus_vs_outputs_written() 1147 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0); in crocus_vs_outputs_written() 1148 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1); in crocus_vs_outputs_written() 1219 !(nir->info.inputs_read & BITFIELD64_BIT(VERT_ATTRIB_EDGEFLAG))) in crocus_compile_vs() 2265 if (key.attrs & BITFIELD64_BIT(VARYING_SLOT_EDGE)) in crocus_update_compiled_sf() [all …]
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/third_party/mesa3d/src/util/ |
D | macros.h | 381 #define BITFIELD64_BIT(b) (1ull << (b)) macro 384 ((b) == 64 ? (~0ull) : BITFIELD64_BIT(b) - 1)
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/third_party/mesa3d/src/compiler/glsl/ |
D | ir_set_program_inouts.cpp | 105 bitfield = BITFIELD64_BIT(idx - VARYING_SLOT_PATCH0); in mark() 109 bitfield = BITFIELD64_BIT(idx); in mark()
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/third_party/mesa3d/src/imagination/rogue/ |
D | rogue_util.h | 124 #define ROH(OFFSET) BITFIELD64_BIT(OFFSET)
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/third_party/mesa3d/src/mesa/program/ |
D | programopt.c | 111 vprog->info.outputs_written |= BITFIELD64_BIT(VARYING_SLOT_POS); in insert_mvp_dp4_code() 212 vprog->info.outputs_written |= BITFIELD64_BIT(VARYING_SLOT_POS); in insert_mvp_mad_code()
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