/third_party/musl/arch/arm/ |
D | atomic_arch.h | 4 #define BLX "mov lr,pc\n\tbx" macro 6 #define BLX "blx" macro 55 BLX " r3" in a_cas() 70 __asm__ __volatile__( BLX " ip" : "+r"(ip) : : "memory", "cc", "lr" ); in a_barrier()
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D | pthread_arch.h | 14 #define BLX "mov lr,pc\n\tbx" macro 16 #define BLX "blx" macro 23 __asm__ ( BLX " %1" : "=r"(tp) : "r"(__a_gettp_ptr) : "cc", "lr" ); in __get_tp()
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/third_party/musl/porting/liteos_m/user/arch/arm/ |
D | atomic_arch.h | 2 #define BLX "mov lr,pc\n\tbx" macro 4 #define BLX "blx" macro 53 BLX " r3" in a_cas() 68 __asm__ __volatile__( BLX " ip" : "+r"(ip) : : "memory", "cc", "lr" ); in a_barrier()
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D | pthread_arch.h | 15 #define BLX "mov lr,pc\n\tbx" 17 #define BLX "blx" 24 __asm__ ( BLX " %1" : "=r"(p) : "r"(__a_gettp_ptr) : "cc", "lr" );
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/third_party/musl/porting/liteos_a/kernel/include/ |
D | atomic_arch.h | 4 #define BLX "mov lr,pc\n\tbx" macro 6 #define BLX "blx" macro 55 BLX " r3" in a_cas() 70 __asm__ __volatile__( BLX " ip" : "+r"(ip) : : "memory", "cc", "lr" ); in a_barrier()
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/third_party/musl/porting/liteos_a/user/arch/arm/ |
D | pthread_arch.h | 14 #define BLX "mov lr,pc\n\tbx" macro 16 #define BLX "blx" macro 23 __asm__ ( BLX " %1" : "=r"(tp) : "r"(__a_gettp_ptr) : "cc", "lr" ); in __get_tp()
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/third_party/node/deps/v8/src/codegen/arm/ |
D | constants-arm.h | 143 BLX = 3 << 4, enumerator
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D | assembler-arm.cc | 504 const Instr kBlxRegPattern = B24 | B21 | 15 * B16 | 15 * B12 | 15 * B8 | BLX; 1511 emit(cond | B24 | B21 | 15 * B16 | 15 * B12 | 15 * B8 | BLX | target.code()); in blx()
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/third_party/pcre2/pcre2/src/sljit/ |
D | sljitNativeARM_32.c | 96 #define BLX 0xe12fff30 macro 288 return push_inst(compiler, BLX | RM(TMP_REG1)); in emit_blx() 528 inst[1] = BLX | RM(TMP_REG1); in inline_set_jump_addr() 2721 …PTR_FAIL_IF(push_inst(compiler, (((type <= SLJIT_JUMP ? BX : BLX) | RM(TMP_REG1)) & ~COND_MASK) | … in sljit_emit_jump() 2977 return push_inst(compiler, (type <= SLJIT_JUMP ? BX : BLX) | RM(src)); in sljit_emit_ijump() 2982 return push_inst(compiler, (type <= SLJIT_JUMP ? BX : BLX) | RM(TMP_REG1)); in sljit_emit_ijump() 2999 FAIL_IF(push_inst(compiler, (type <= SLJIT_JUMP ? BX : BLX) | RM(TMP_REG1))); in sljit_emit_ijump()
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D | sljitNativeARM_T2_32.c | 118 #define BLX 0x4780 macro 2298 PTR_FAIL_IF(push_inst16(compiler, BLX | RN3(TMP_REG1))); in sljit_emit_jump() 2552 return push_inst16(compiler, (type <= SLJIT_JUMP ? BX : BLX) | RN3(src)); in sljit_emit_ijump() 2557 return push_inst16(compiler, BLX | RN3(TMP_REG1)); in sljit_emit_ijump() 2568 return push_inst16(compiler, (type <= SLJIT_JUMP ? BX : BLX) | RN3(TMP_REG1)); in sljit_emit_ijump()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMCallLowering.cpp | 494 return ARM::BLX; in getCallOpcode()
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D | ARMScheduleA57.td | 169 // B, BX, BL, BLX (imm, reg != LR, reg == LR), CBZ, CBNZ 175 def : InstRW<[A57Write_2cyc_1B_1I], (instregex "BLX", "tBLX(NS)?r")>;
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D | ARMExpandPseudoInsts.cpp | 1429 TII->get(Thumb ? ARM::tBLXr : ARM::BLX)); in ExpandMI()
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D | ARMFastISel.cpp | 2179 return isThumb2 ? ARM::tBLXr : ARM::BLX; in ARMSelectCallOp()
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D | ARMInstrThumb.td | 149 // Target for BLX *from* thumb mode.
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D | ARMInstrInfo.td | 453 // Target for BLX *from* ARM mode. 2380 def BLX : AXI<(outs), (ins GPR:$func), BrMiscFrm, 2471 // BLX (immediate)
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/third_party/node/deps/v8/src/diagnostics/arm/ |
D | disasm-arm.cc | 909 case BLX: in DecodeType01()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
D | ARMGenAsmWriter.inc | 1332 4286299U, // BLX 5556 0U, // BLX 9221 // AESD, AESE, AESIMC, AESMC, BKPT, BL, BLX, BLXi, BX, CPS1p, CRC32B, CRC... 9432 // BKPT, BL, BLX, BLXi, BX, CPS1p, ERET, HLT, HVC, MVE_LETP, RFEDA, RFEDB...
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D | ARMGenMCCodeEmitter.inc | 640 UINT64_C(3778019120), // BLX 12252 case ARM::BLX: { 17315 CEFBS_IsARM_HasV5T, // BLX = 627
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D | ARMGenFastISel.inc | 84 return fastEmitInst_r(ARM::BLX, &ARM::GPRRegClass, Op0, Op0IsKill);
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D | ARMGenInstrInfo.inc | 642 BLX = 627, 6473 …D::Call), 0x180ULL, ImplicitList2, ImplicitList3, OperandInfo69, -1 ,nullptr }, // Inst #627 = BLX
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D | ARMGenAsmMatcher.inc | 10385 { 108 /* blx */, ARM::BLX, Convert__Reg1_0, AMFBS_IsARM_HasV5T, { MCK_GPR }, },
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D | ARMGenDisassemblerTables.inc | 636 /* 2792 */ MCD::OPC_Decode, 243, 4, 34, // Opcode: BLX
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/third_party/node/deps/v8/src/execution/arm/ |
D | simulator-arm.cc | 2344 case BLX: { in DecodeType01()
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/third_party/cups-filters/cupsfilters/ |
D | image.ppm | 3416 …|d4�mH{gLfSBWE;RA:ZMEtkb����������������xx�hu�et�eu�fp�bf�XW}JMqKQleMajGU`BLX=CQ8<H21?*,8(/;…
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