/third_party/mesa3d/src/intel/compiler/ |
D | test_eu_compact.cpp | 44 case BRW_ALIGN_1: in get_compact_params_name() 242 CompactParams{ 50, BRW_ALIGN_1 }, CompactParams{ 50, BRW_ALIGN_16 }, 243 CompactParams{ 60, BRW_ALIGN_1 }, CompactParams{ 60, BRW_ALIGN_16 }, 244 CompactParams{ 70, BRW_ALIGN_1 }, CompactParams{ 70, BRW_ALIGN_16 }, 245 CompactParams{ 75, BRW_ALIGN_1 }, CompactParams{ 75, BRW_ALIGN_16 }, 246 CompactParams{ 80, BRW_ALIGN_1 }, CompactParams{ 80, BRW_ALIGN_16 }, 247 CompactParams{ 90, BRW_ALIGN_1 }, CompactParams{ 90, BRW_ALIGN_16 }, 248 CompactParams{ 110, BRW_ALIGN_1 }, 249 CompactParams{ 120, BRW_ALIGN_1 }, 250 CompactParams{ 125, BRW_ALIGN_1 } [all …]
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D | brw_vec4_generator.cpp | 68 brw_set_default_access_mode(p, BRW_ALIGN_1); in generate_math_gfx6() 227 brw_set_default_access_mode(p, BRW_ALIGN_1); in generate_tex() 300 brw_set_default_access_mode(p, BRW_ALIGN_1); in generate_tex() 384 brw_set_default_access_mode(p, BRW_ALIGN_1); in generate_gs_urb_write_allocate() 431 brw_set_default_access_mode(p, BRW_ALIGN_1); in generate_gs_set_write_offset() 471 brw_set_default_access_mode(p, BRW_ALIGN_1); in generate_gs_set_vertex_count() 529 brw_set_default_access_mode(p, BRW_ALIGN_1); in generate_gs_svb_set_destination_index() 541 brw_set_default_access_mode(p, BRW_ALIGN_1); in generate_gs_set_dword_2() 559 brw_set_default_access_mode(p, BRW_ALIGN_1); in generate_gs_prepare_channel_masks() 623 brw_set_default_access_mode(p, BRW_ALIGN_1); in generate_gs_set_channel_masks() [all …]
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D | brw_eu_emit.c | 146 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { in brw_set_dest() 169 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { in brw_set_dest() 283 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { in brw_set_src0() 291 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { in brw_set_src0() 298 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { in brw_set_src0() 399 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { in brw_set_src1() 405 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { in brw_set_src1() 828 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { in brw_alu3() 1134 brw_get_default_access_mode(p) == BRW_ALIGN_1 && in ALU1() 1277 brw_set_default_access_mode(p, BRW_ALIGN_1); in brw_F32TO16() [all …]
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D | brw_clip_util.c | 96 brw_set_default_access_mode(p, BRW_ALIGN_1); in brw_clip_project_position() 211 brw_set_default_access_mode(p, BRW_ALIGN_1); in brw_clip_interp_vertex() 232 brw_set_default_access_mode(p, BRW_ALIGN_1); in brw_clip_interp_vertex()
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D | brw_eu_validate.c | 325 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { in invalid_values() 761 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) in general_restrictions_based_on_operand_types() 781 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { in general_restrictions_based_on_operand_types() 939 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { in general_restrictions_based_on_operand_types() 986 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1 && in general_restrictions_based_on_operand_types() 1793 unsigned dst_subreg = brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1 ? in vector_immediate_restrictions() 1921 brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1 && in special_requirements_for_handling_double_precision_data_types()
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D | brw_disasm.c | 926 } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { in dest() 978 bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1; in dest_3src() 1259 bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1; in src0_3src() 1346 bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1; in src1_3src() 1420 bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1; in src2_3src() 1646 } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { in src0() 1710 } else if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { in src1() 1907 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { in brw_disassemble_inst()
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D | brw_compile_ff_gs.c | 481 brw_set_default_access_mode(p, BRW_ALIGN_1); in gfx6_sol_program()
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D | brw_clip_unfilled.c | 87 brw_set_default_access_mode(p, BRW_ALIGN_1); in compute_tri_direction()
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D | brw_inst.h | 321 FK(access_mode, /* 4+ */ 8, 8, /* 12+ */ BRW_ALIGN_1) 376 FK(3src_access_mode, /* 4+ */ 8, 8, /* 12+ */ BRW_ALIGN_1)
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D | brw_eu_defines.h | 75 #define BRW_ALIGN_1 0 macro
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D | brw_compile_sf.c | 664 brw_set_default_access_mode(p, BRW_ALIGN_1); in brw_emit_point_sprite_setup()
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D | test_eu_validate.cpp | 497 brw_set_default_access_mode(p, BRW_ALIGN_1); in TEST_P() 569 { BRW_ALIGN_1, devinfo.ver >= 10 },
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D | brw_fs_generator.cpp | 1888 brw_set_default_access_mode(p, BRW_ALIGN_1); in generate_code()
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/third_party/mesa3d/src/intel/tools/ |
D | i965_gram.y | 546 options->access_mode = BRW_ALIGN_1; in add_instruction_option()
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