| /third_party/skia/third_party/externals/swiftshader/src/Common/ |
| D | CPUID.cpp | 32 bool CPUID::MMX = detectMMX();
33 bool CPUID::CMOV = detectCMOV();
34 bool CPUID::SSE = detectSSE();
35 bool CPUID::SSE2 = detectSSE2();
36 bool CPUID::SSE3 = detectSSE3();
37 bool CPUID::SSSE3 = detectSSSE3();
38 bool CPUID::SSE4_1 = detectSSE4_1();
39 int CPUID::cores = detectCoreCount();
40 int CPUID::affinity = detectAffinity();
42 bool CPUID::enableMMX = true;
[all …]
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| D | CPUID.hpp | 28 class CPUID class
86 inline bool CPUID::supportsMMX() in supportsMMX()
91 inline bool CPUID::supportsCMOV() in supportsCMOV()
96 inline bool CPUID::supportsMMX2() in supportsMMX2()
101 inline bool CPUID::supportsSSE() in supportsSSE()
106 inline bool CPUID::supportsSSE2() in supportsSSE2()
111 inline bool CPUID::supportsSSE3() in supportsSSE3()
116 inline bool CPUID::supportsSSSE3() in supportsSSSE3()
121 inline bool CPUID::supportsSSE4_1() in supportsSSE4_1()
126 inline int CPUID::coreCount() in coreCount()
[all …]
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| D | CMakeLists.txt | 27 CPUID.cpp
41 CPUID.hpp
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| D | BUILD.gn | 29 "CPUID.cpp",
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| /third_party/skia/third_party/externals/swiftshader/src/System/ |
| D | CPUID.cpp | 50 bool CPUID::supportsMMX() in supportsMMX()
57 bool CPUID::supportsCMOV() in supportsCMOV()
64 bool CPUID::supportsSSE() in supportsSSE()
71 bool CPUID::supportsSSE2() in supportsSSE2()
78 bool CPUID::supportsSSE3() in supportsSSE3()
85 bool CPUID::supportsSSSE3() in supportsSSSE3()
92 bool CPUID::supportsSSE4_1() in supportsSSE4_1()
99 int CPUID::coreCount() in coreCount()
128 int CPUID::processAffinity() in processAffinity()
157 void CPUID::setFlushToZero(bool enable) in setFlushToZero()
[all …]
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| D | BUILD.gn | 20 "CPUID.hpp",
41 "CPUID.cpp",
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| D | CMakeLists.txt | 25 CPUID.cpp
26 CPUID.hpp
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| D | CPUID.hpp | 28 class CPUID class
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| /third_party/skia/third_party/externals/swiftshader/src/Reactor/ |
| D | CPUID.cpp | 50 bool CPUID::supportsMMX() in supportsMMX()
57 bool CPUID::supportsCMOV() in supportsCMOV()
64 bool CPUID::supportsSSE() in supportsSSE()
71 bool CPUID::supportsSSE2() in supportsSSE2()
78 bool CPUID::supportsSSE3() in supportsSSE3()
85 bool CPUID::supportsSSSE3() in supportsSSSE3()
92 bool CPUID::supportsSSE4_1() in supportsSSE4_1()
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| D | CMakeLists.txt | 49 CPUID.cpp
50 CPUID.hpp
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| D | CPUID.hpp | 28 class CPUID class
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| D | SubzeroReactor.cpp | 287 class CPUID class
337 constexpr bool CPUID::ARM = CPUID::detectARM();
338 const bool CPUID::SSE4_1 = CPUID::detectSSE4_1();
340 constexpr bool emulateMismatchedBitCast = CPUID::ARM;
522 if(CPUID::ARM) in relocateSymbol()
895 …Flags.setTargetInstructionSet(CPUID::SSE4_1 ? Ice::X86InstructionSet_SSE4_1 : Ice::X86InstructionS… in Nucleus()
2367 if(emulateIntrinsics || CPUID::ARM) in SignMask()
2479 if(emulateIntrinsics || CPUID::ARM) in SignMask()
2812 if(CPUID::SSE4_1) in UShort4()
2819 else if(CPUID::ARM) in UShort4()
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| /third_party/lame/libmp3lame/i386/ |
| D | cpu_feat.nas | 39 jz return0 ; no CPUID command, so no MMX
42 CPUID
54 jz return0 ; no CPUID command, so no SSE
57 CPUID
69 jz return0 ; no CPUID command, so no SSE2
72 CPUID
84 jz return0 ; no CPUID command, so no 3DNow!
87 CPUID
92 CPUID
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| /third_party/mesa3d/src/mesa/x86/ |
| D | common_x86_asm.S | 80 CPUID
103 CPUID
116 CPUID
130 CPUID
144 CPUID
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
| D | MCInstrAnalysis.h | 109 unsigned CPUID) const { in isZeroIdiom() argument
134 unsigned CPUID) const { in isDependencyBreaking() argument
135 return isZeroIdiom(MI, Mask, CPUID); in isDependencyBreaking()
145 unsigned CPUID) const { in isOptimizableRegisterMove() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenSubtargetInfo.inc | 13759 const MCInst *MI, unsigned CPUID) {
13762 if (CPUID == 2) { // CortexA53Model
13767 if (CPUID == 9) { // ThunderXT8XModel
13774 if (CPUID == 2) { // CortexA53Model
13779 if (CPUID == 9) { // ThunderXT8XModel
13786 if (CPUID == 4) { // ExynosM3Model
13797 if (CPUID == 5) { // ExynosM4Model
13808 if (CPUID == 6) { // ExynosM5Model
13821 if (CPUID == 1) { // CycloneModel
13826 if (CPUID == 5) { // ExynosM4Model
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MC/ |
| D | MCSchedule.cpp | 75 unsigned CPUID = getProcessorID(); in computeInstrLatency() local
77 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, CPUID); in computeInstrLatency()
121 unsigned CPUID = getProcessorID(); in getReciprocalThroughput() local
123 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, CPUID); in getReciprocalThroughput()
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| /third_party/openssl/crypto/ |
| D | build.info | 62 # CPUID support. We need to add that explicitly in every shared library and
63 # provider module that uses it. ctype.c is included here because the CPUID
72 # We only need to include the CPUID stuff in the legacy provider when it's a
81 # Implementations are now spread across several libraries, so the CPUID define
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| /third_party/node/deps/openssl/openssl/crypto/ |
| D | build.info | 62 # CPUID support. We need to add that explicitly in every shared library and
63 # provider module that uses it. ctype.c is included here because the CPUID
72 # We only need to include the CPUID stuff in the legacy provider when it's a
81 # Implementations are now spread across several libraries, so the CPUID define
|
| /third_party/skia/third_party/externals/libjpeg-turbo/simd/i386/ |
| D | jsimdcpu.asm | 50 jz near .return ; CPUID is not supported
52 ; Check whether CPUID leaf 07H is supported
88 ; Check CPUID leaf 01H for MMX, SSE, and SSE2 support
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenSubtargetInfo.inc | 18288 const MCInst *MI, unsigned CPUID) {
18291 if (CPUID == 4) { // CortexA57Model
18294 if (CPUID == 7) { // SwiftModel
18299 if (CPUID == 4) { // CortexA57Model
18302 if (CPUID == 7) { // SwiftModel
18307 if (CPUID == 7) { // SwiftModel
18312 if (CPUID == 7) { // SwiftModel
18317 if (CPUID == 4) { // CortexA57Model
18320 if (CPUID == 7) { // SwiftModel
18325 if (CPUID == 4) { // CortexA57Model
[all …]
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| /third_party/openh264/codec/common/x86/ |
| D | cpuid.asm | 56 ; section CPUID - CPU Identification
227 cmp ecx, 0x08000000 ; check CPUID.1:ECX.OSXSAVE[bit 27]
237 ; check AVX512 flag CPUID.7:EBX.AVX512F[bit 16]
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| /third_party/openssl/doc/man3/ |
| D | OPENSSL_ia32cap.pod | 15 by processor in EDX:ECX register pair after executing CPUID instruction
80 variable" terms. The truth is that it's not copied from CPUID output
87 CPUID with EAX=7 and ECX=0 as input. Following bits are significant:
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| /third_party/skia/third_party/externals/swiftshader/src/ |
| D | Android.bp | 35 "Reactor/CPUID.cpp",
184 "System/CPUID.cpp",
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/ |
| D | X86GenSubtargetInfo.inc | 6386 {DBGFIELD("CPUID") 1, false, false, 69, 1, 53, 1, 0, 0}, // #697
7763 {DBGFIELD("CPUID") 1, false, false, 96, 2, 2, 1, 0, 0}, // #697
9140 {DBGFIELD("CPUID") 8, false, false, 1768, 11, 29, 1, 0, 0}, // #697
10517 {DBGFIELD("CPUID") 1, false, false, 1, 1, 2, 1, 0, 0}, // #697
11894 {DBGFIELD("CPUID") 8, false, false, 1768, 11, 29, 1, 0, 0}, // #697
13271 {DBGFIELD("CPUID") 1, false, false, 709, 2, 2, 1, 0, 0}, // #697
14648 {DBGFIELD("CPUID") 8, false, false, 1768, 11, 29, 1, 0, 0}, // #697
16025 {DBGFIELD("CPUID") 1, false, false, 3805, 2, 2, 1, 0, 0}, // #697
17402 {DBGFIELD("CPUID") 8, false, false, 1768, 11, 29, 1, 0, 0}, // #697
18779 {DBGFIELD("CPUID") 1, false, false, 0, 0, 2, 1, 0, 0}, // #697
[all …]
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