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Searched refs:CTX (Results 1 – 25 of 28) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUMachineModuleInfo.cpp22 LLVMContext &CTX = MMI.getModule()->getContext(); in AMDGPUMachineModuleInfo() local
23 AgentSSID = CTX.getOrInsertSyncScopeID("agent"); in AMDGPUMachineModuleInfo()
24 WorkgroupSSID = CTX.getOrInsertSyncScopeID("workgroup"); in AMDGPUMachineModuleInfo()
25 WavefrontSSID = CTX.getOrInsertSyncScopeID("wavefront"); in AMDGPUMachineModuleInfo()
27 CTX.getOrInsertSyncScopeID("one-as"); in AMDGPUMachineModuleInfo()
29 CTX.getOrInsertSyncScopeID("agent-one-as"); in AMDGPUMachineModuleInfo()
31 CTX.getOrInsertSyncScopeID("workgroup-one-as"); in AMDGPUMachineModuleInfo()
33 CTX.getOrInsertSyncScopeID("wavefront-one-as"); in AMDGPUMachineModuleInfo()
35 CTX.getOrInsertSyncScopeID("singlethread-one-as"); in AMDGPUMachineModuleInfo()
/third_party/openssl/test/
Dcmp_ctx_test.c510 #define DEFINE_SET_GET_TEST(OSSL_CMP, CTX, N, M, DUP, FIELD, TYPE) \ argument
511 DEFINE_SET_GET_BASE_TEST(OSSL_CMP##_##CTX, set##N, get##M, DUP, FIELD, \
514 #define DEFINE_SET_GET_SK_TEST_DEFAULT(OSSL_CMP, CTX, N, M, FIELD, ELEM_TYPE, \ argument
516 DEFINE_SET_GET_BASE_TEST(OSSL_CMP##_##CTX, set##N, get##M, 1, FIELD, \
518 #define DEFINE_SET_GET_SK_TEST(OSSL_CMP, CTX, N, M, FIELD, T) \ argument
519 DEFINE_SET_GET_SK_TEST_DEFAULT(OSSL_CMP, CTX, N, M, FIELD, T, \
521 #define DEFINE_SET_GET_SK_X509_TEST(OSSL_CMP, CTX, N, M, FNAME) \ argument
522 DEFINE_SET_GET_SK_TEST_DEFAULT(OSSL_CMP, CTX, N, M, FNAME, X509, \
526 #define DEFINE_SET_GET_TEST_DEFAULT(OSSL_CMP, CTX, N, M, DUP, FIELD, TYPE, \ argument
528 DEFINE_SET_GET_BASE_TEST(OSSL_CMP##_##CTX, set##N, get##M, DUP, FIELD, \
[all …]
/third_party/openssl/providers/implementations/include/prov/
Ddigestcommon.h51 name, CTX, blksize, dgstsize, flags, upd, fin) \ argument
57 CTX *ctx = ossl_prov_is_running() ? OPENSSL_zalloc(sizeof(*ctx)) : NULL; \
62 CTX *ctx = (CTX *)vctx; \
67 CTX *in = (CTX *)ctx; \
68 CTX *ret = ossl_prov_is_running() ? OPENSSL_malloc(sizeof(*ret)) : NULL; \
88 name, CTX, blksize, dgstsize, flags, init, upd, fin) \ argument
95 PROV_DISPATCH_FUNC_DIGEST_CONSTRUCT_START(name, CTX, blksize, dgstsize, flags, \
101 name, CTX, blksize, dgstsize, flags, init, upd, fin, \ argument
110 PROV_DISPATCH_FUNC_DIGEST_CONSTRUCT_START(name, CTX, blksize, dgstsize, flags, \
/third_party/node/deps/openssl/openssl/providers/implementations/include/prov/
Ddigestcommon.h51 name, CTX, blksize, dgstsize, flags, upd, fin) \ argument
57 CTX *ctx = ossl_prov_is_running() ? OPENSSL_zalloc(sizeof(*ctx)) : NULL; \
62 CTX *ctx = (CTX *)vctx; \
67 CTX *in = (CTX *)ctx; \
68 CTX *ret = ossl_prov_is_running() ? OPENSSL_malloc(sizeof(*ret)) : NULL; \
88 name, CTX, blksize, dgstsize, flags, init, upd, fin) \ argument
95 PROV_DISPATCH_FUNC_DIGEST_CONSTRUCT_START(name, CTX, blksize, dgstsize, flags, \
101 name, CTX, blksize, dgstsize, flags, init, upd, fin, \ argument
110 PROV_DISPATCH_FUNC_DIGEST_CONSTRUCT_START(name, CTX, blksize, dgstsize, flags, \
/third_party/openssl/crypto/sha/asm/
Dsha1-c64xplus.pl37 ($CTX,$INP,$NUM) = ("A4","B4","A6"); # arguments
72 [A0] LDW *${CTX}[0],$A ; load A-E...
74 [A0] LDW *${CTX}[1],$B
76 [A0] LDW *${CTX}[2],$C
78 [A0] LDW *${CTX}[3],$D
80 [A0] LDW *${CTX}[4],$E
321 STW $A,*${CTX}[0] ; emit A-E...
323 STW $B,*${CTX}[1]
325 STW $C,*${CTX}[2]
326 STW $D,*${CTX}[3]
[all …]
/third_party/node/deps/openssl/openssl/crypto/sha/asm/
Dsha1-c64xplus.pl37 ($CTX,$INP,$NUM) = ("A4","B4","A6"); # arguments
72 [A0] LDW *${CTX}[0],$A ; load A-E...
74 [A0] LDW *${CTX}[1],$B
76 [A0] LDW *${CTX}[2],$C
78 [A0] LDW *${CTX}[3],$D
80 [A0] LDW *${CTX}[4],$E
321 STW $A,*${CTX}[0] ; emit A-E...
323 STW $B,*${CTX}[1]
325 STW $C,*${CTX}[2]
326 STW $D,*${CTX}[3]
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/DebugInfo/DWARF/
DDWARFDebugAranges.cpp40 void DWARFDebugAranges::generate(DWARFContext *CTX) { in generate() argument
42 if (!CTX) in generate()
46 DataExtractor ArangesData(CTX->getDWARFObj().getArangesSection(), in generate()
47 CTX->isLittleEndian(), 0); in generate()
53 for (const auto &CU : CTX->compile_units()) { in generate()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/
DARMMCCodeEmitter.cpp52 MCContext &CTX; member in __anon58103d760111::ARMMCCodeEmitter
57 : MCII(mcii), CTX(ctx), IsLittleEndian(IsLittle) { in ARMMCCodeEmitter()
565 unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg); in getMachineOpValue()
603 Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in EncodeAddrModeOpValues()
938 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getThumbAddrModeRegRegOpValue()
939 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO2.getReg()); in getThumbAddrModeRegRegOpValue()
991 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. in getAddrModeImm12OpValue()
1070 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(M0.getReg()); in getMveAddrModeRQOpValue()
1071 unsigned Qm = CTX.getRegisterInfo()->getEncodingValue(M1.getReg()); in getMveAddrModeRQOpValue()
1090 unsigned Qm = CTX.getRegisterInfo()->getEncodingValue(M0.getReg()); in getMveAddrModeQOpValue()
[all …]
/third_party/python/Modules/_decimal/
D_decimal.c97 #undef CTX
109 #define CTX(v) (&((PyDecContextObject *)v)->ctx) macro
482 mpd_context_t *ctx = CTX(context); in dec_addstatus()
729 return PyLong_FromSsize_t(mpd_get##mem(CTX(self))); \
736 return PyLong_FromUnsignedLong(mpd_get##mem(CTX(self))); \
752 int i = mpd_getround(CTX(self)); in Dec_CONTEXT_GET_SSIZE()
768 return PyLong_FromLong(mpd_getcr(CTX(self))); in context_getallcr()
775 return PyLong_FromSsize_t(mpd_etiny(CTX(self))); in context_getetiny()
781 return PyLong_FromSsize_t(mpd_etop(CTX(self))); in context_getetop()
795 ctx = CTX(self); in context_setprec()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/
DLanaiMCInstLower.h33 LanaiMCInstLower(MCContext &CTX, AsmPrinter &AP) : Ctx(CTX), Printer(AP) {} in LanaiMCInstLower() argument
/third_party/lzma/C/
DPpmd7Enc.c78 #define CTX(ref) ((CPpmd7_Context *)Ppmd7_GetContext(p, ref)) macro
79 #define SUFFIX(ctx) CTX((ctx)->Suffix)
169 CPpmd7_Context *c = CTX(SUCCESSOR(s)); in Ppmd7z_EncodeSymbol()
336 #undef CTX
DPpmd7Dec.c56 #define CTX(ref) ((CPpmd7_Context *)Ppmd7_GetContext(p, ref)) macro
155 CPpmd7_Context *c = CTX(SUCCESSOR(s)); in Ppmd7z_DecodeSymbol()
310 #undef CTX
DPpmd7.c31 #define CTX(ref) ((CPpmd7_Context *)Ppmd7_GetContext(p, ref)) macro
34 #define SUFFIX(ctx) CTX((ctx)->Suffix)
482 c = CTX(successor); in Ppmd7_CreateSuccessors()
696 p->MaxContext = p->MinContext = CTX(minSuccessor); in Ppmd7_UpdateModel()
953 PPMD7_CTX_PTR c = CTX(SUCCESSOR(p->FoundState)); in Ppmd7_NextContext()
1114 #undef CTX
/third_party/openssl/util/
Dcheck-format-test-negatives.c427 CTX *ctx = fixture->ctx; \
428 int (*set_fn)(CTX *ctx, TYPE) = \
429 (int (*)(CTX *ctx, TYPE))PREFIX##_##SETN##_##FIELD; \
/third_party/node/deps/openssl/openssl/util/
Dcheck-format-test-negatives.c427 CTX *ctx = fixture->ctx; \
428 int (*set_fn)(CTX *ctx, TYPE) = \
429 (int (*)(CTX *ctx, TYPE))PREFIX##_##SETN##_##FIELD; \
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/MCTargetDesc/
DPPCMCCodeEmitter.h27 const MCContext &CTX; variable
32 : MCII(mcii), CTX(ctx), in PPCMCCodeEmitter()
DPPCMCCodeEmitter.cpp220 return CTX.getRegisterInfo()->getEncodingValue(isPPC64 ? PPC::X13 : PPC::R2); in getTLSRegEncoding()
243 return 0x80 >> CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in get_crbitm_encoding()
274 return CTX.getRegisterInfo()->getEncodingValue(Reg); in getMachineOpValue()
/third_party/python/Modules/_ctypes/libffi_osx/x86/
Dx86-ffi_darwin.c307 #define FFI_INIT_TRAMPOLINE(TRAMP,FUN,CTX) \ argument
310 unsigned int __ctx = (unsigned int)(CTX); \
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/DebugInfo/DWARF/
DDWARFDebugAranges.h23 void generate(DWARFContext *CTX);
/third_party/mesa3d/src/gallium/drivers/r600/sb/
Dsb_bc_fmt_def.inc527 BC_FIELD(TEX_WORD1, COORD_TYPE_X, CTX, 28, 28)
/third_party/mesa3d/src/mesa/main/
Dbufferobj.c641 #define BUFFER_USAGE_WARNING(CTX, FMT, ...) \ argument
644 buffer_usage_warning(CTX, &id, FMT, ##__VA_ARGS__); \
/third_party/python/Python/
Dcompile.c1637 #define VISIT_SLICE(C, V, CTX) {\ argument
1638 if (!compiler_visit_slice((C), (V), (CTX))) \
/third_party/openssl/doc/man3/
DEVP_EncryptInit.pod1479 passed in separate calls. It also means that the flags set for the CTX are
/third_party/mesa3d/docs/relnotes/
D22.1.0.rst3186 - include/drm-uapi: update amdgpu_drm.h for new CTX OP to set/get stable pstates
3188 - radv/winsys: add support for new CTX OP to set/get stable pstates
/third_party/node/deps/openssl/openssl/
DCHANGES.md4579 * SSL_{CTX}_set_tmp_ecdh() which can set 1 EC curve now internally calls
7553 and can vary with the CTX.

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