Searched refs:Dst0Reg (Results 1 – 2 of 2) sorted by relevance
395 Register Dst0Reg = I.getOperand(0).getReg(); in selectG_UADDO_USUBO_UADDE_USUBE() local425 BuildMI(*BB, &I, DL, TII.get(HasCarryIn ? CarryOpc : NoCarryOpc), Dst0Reg) in selectG_UADDO_USUBO_UADDE_USUBE()434 if (!RBI.constrainGenericRegister(Dst0Reg, AMDGPU::SReg_32RegClass, *MRI) || in selectG_UADDO_USUBO_UADDE_USUBE()
1309 Register Dst0Reg = MI.getOperand(0).getReg(); in widenScalarUnmergeValues() local1310 LLT DstTy = MRI.getType(Dst0Reg); in widenScalarUnmergeValues()4169 Register Dst0Reg = MI.getOperand(0).getReg(); in lowerUnmergeValues() local4170 LLT DstTy = MRI.getType(Dst0Reg); in lowerUnmergeValues()4179 MIRBuilder.buildTrunc(Dst0Reg, Cast); in lowerUnmergeValues()