| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 615 SmallVector<Register, 2> DstRegs; in narrowScalar() local
617 DstRegs.push_back( in narrowScalar()
622 MIRBuilder.buildBuildVector(DstReg, DstRegs); in narrowScalar()
624 MIRBuilder.buildMerge(DstReg, DstRegs); in narrowScalar()
727 SmallVector<Register, 2> Src1Regs, Src2Regs, DstRegs; in narrowScalar() local
743 DstRegs.push_back(DstReg); in narrowScalar()
748 MIRBuilder.buildBuildVector(DstReg, DstRegs); in narrowScalar()
750 MIRBuilder.buildMerge(DstReg, DstRegs); in narrowScalar()
762 SmallVector<Register, 2> Src1Regs, Src2Regs, DstRegs; in narrowScalar() local
770 DstRegs.push_back(DstReg); in narrowScalar()
[all …]
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| D | CallLowering.cpp | 155 void CallLowering::unpackRegs(ArrayRef<Register> DstRegs, Register SrcReg, in unpackRegs() argument
158 assert(DstRegs.size() > 1 && "Nothing to unpack"); in unpackRegs()
165 assert(LLTs.size() == DstRegs.size() && "Regs / types mismatch"); in unpackRegs()
167 for (unsigned i = 0; i < DstRegs.size(); ++i) in unpackRegs()
168 MIRBuilder.buildExtract(DstRegs[i], SrcReg, Offsets[i]); in unpackRegs()
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| D | IRTranslator.cpp | 978 auto &DstRegs = allocateVRegs(U); in translateExtractValue() local
980 for (unsigned i = 0; i < DstRegs.size(); ++i) in translateExtractValue()
981 DstRegs[i] = SrcRegs[Idx++]; in translateExtractValue()
990 auto &DstRegs = allocateVRegs(U); in translateInsertValue() local
996 for (unsigned i = 0; i < DstRegs.size(); ++i) { in translateInsertValue()
998 DstRegs[i] = *InsertedIt++; in translateInsertValue()
1000 DstRegs[i] = SrcRegs[i]; in translateInsertValue()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | LegalizationArtifactCombiner.h | 326 SmallVector<Register, 2> DstRegs; in tryCombineMerges() local
329 DstRegs.push_back(MI.getOperand(DefIdx).getReg()); in tryCombineMerges()
343 Builder.buildInstr(ConvertOp, {DstRegs[j]}, {TmpRegs[j]}); in tryCombineMerges()
345 Builder.buildUnmerge(DstRegs, MergeI->getOperand(Idx + 1).getReg()); in tryCombineMerges()
347 UpdatedDefs.append(DstRegs.begin(), DstRegs.end()); in tryCombineMerges()
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| D | CallLowering.h | 202 void unpackRegs(ArrayRef<Register> DstRegs, Register SrcReg, Type *PackedTy,
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| D | LegalizerHelper.h | 169 void multiplyRegisters(SmallVectorImpl<Register> &DstRegs,
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCallLowering.cpp | 219 ArrayRef<Register> DstRegs, in unpackRegsToOrigType() argument
223 assert(DstRegs.size() > 1 && "Nothing to unpack"); in unpackRegsToOrigType()
236 for (int i = 0, e = DstRegs.size(); i != e; ++i) in unpackRegsToOrigType()
237 B.buildAnyExt(DstRegs[i], UnmergeToEltTy.getReg(i)); in unpackRegsToOrigType()
242 B.buildUnmerge(DstRegs, SrcReg); in unpackRegsToOrigType()
255 for (unsigned i = 0, e = DstRegs.size(); i != e; ++i, Offset += PartSize) in unpackRegsToOrigType()
256 B.buildExtract(DstRegs[i], BigReg, Offset); in unpackRegsToOrigType()
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| D | R600ControlFlowFinalizer.cpp | 297 std::set<unsigned> &DstRegs) const { in isCompatibleWithClause()
324 if ((DstRegs.find(SrcMI) == DstRegs.end())) { in isCompatibleWithClause()
325 DstRegs.insert(DstMI); in isCompatibleWithClause()
338 std::set<unsigned> DstRegs; in MakeFetchClause() local
347 if (!isCompatibleWithClause(*I, DstRegs)) in MakeFetchClause()
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| D | AMDGPURegisterBankInfo.cpp | 1933 SmallVector<Register, 2> DstRegs(OpdMapper.getVRegs(0)); in applyMappingImpl() local
1956 if (DstRegs.empty()) { in applyMappingImpl()
1994 auto Extract0 = B.buildExtractVectorElement(DstRegs[0], CastSrc, IdxLo); in applyMappingImpl()
1995 auto Extract1 = B.buildExtractVectorElement(DstRegs[1], CastSrc, IdxHi); in applyMappingImpl()
2028 buildVCopy(B, DstRegs[0], TmpReg0); in applyMappingImpl()
2029 buildVCopy(B, DstRegs[1], TmpReg1); in applyMappingImpl()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 966 SmallSet<unsigned, 4> DstRegs; in copyPhysReg() local
973 assert(!DstRegs.count(Src) && "destructive vector copy"); in copyPhysReg()
974 DstRegs.insert(Dst); in copyPhysReg()
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