Searched refs:ExecReg (Results 1 – 4 of 4) sorted by relevance
62 unsigned ExecReg; member in __anone1eceb8c0111::SILowerI1Copies465 ExecReg = AMDGPU::EXEC_LO; in runOnMachineFunction()473 ExecReg = AMDGPU::EXEC; in runOnMachineFunction()827 BuildMI(MBB, I, DL, TII->get(AMDGPU::COPY), DstReg).addReg(ExecReg); in buildMergeLaneMasks()830 .addReg(ExecReg) in buildMergeLaneMasks()845 .addReg(ExecReg); in buildMergeLaneMasks()856 .addReg(ExecReg); in buildMergeLaneMasks()869 .addReg(ExecReg); in buildMergeLaneMasks()873 .addReg(CurMaskedReg ? CurMaskedReg : ExecReg); in buildMergeLaneMasks()
349 const unsigned ExecReg = IsWave32 ? AMDGPU::EXEC_LO : AMDGPU::EXEC; in optimizeVccBranch() local359 if (A->modifiesRegister(ExecReg, TRI)) in optimizeVccBranch()373 if (Op1.getReg() != ExecReg && Op2.isReg() && Op2.getReg() == ExecReg) { in optimizeVccBranch()377 if (Op1.getReg() != ExecReg) in optimizeVccBranch()412 if (SReg == ExecReg) { in optimizeVccBranch()
199 const unsigned ExecReg = Wave32 ? AMDGPU::EXEC_LO : AMDGPU::EXEC; in optimizeVcndVcmpPair() local217 if (CmpReg == ExecReg) { in optimizeVcndVcmpPair()221 } else if (And->getOperand(2).getReg() != ExecReg) { in optimizeVcndVcmpPair()262 .addReg(ExecReg) in optimizeVcndVcmpPair()
755 const unsigned ExecReg = Subtarget.isWave32() ? in executeInWaterfallLoop() local1003 .addDef(ExecReg) in executeInWaterfallLoop()1004 .addReg(ExecReg) in executeInWaterfallLoop()1016 .addReg(ExecReg); in executeInWaterfallLoop()1021 .addDef(ExecReg) in executeInWaterfallLoop()