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Searched refs:ExtractBits (Results 1 – 25 of 26) sorted by relevance

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/third_party/vixl/src/aarch64/
Dconstants-aarch64.h76 V_(Rd, 4, 0, ExtractBits) /* Destination register. */ \
77 V_(Rn, 9, 5, ExtractBits) /* First source register. */ \
78 V_(Rm, 20, 16, ExtractBits) /* Second source register. */ \
79 V_(RmLow16, 19, 16, ExtractBits) /* Second source register (code 0-15). */ \
80 V_(Ra, 14, 10, ExtractBits) /* Third source register. */ \
81 V_(Rt, 4, 0, ExtractBits) /* Load/store register. */ \
82 V_(Rt2, 14, 10, ExtractBits) /* Load/store second register. */ \
83 V_(Rs, 20, 16, ExtractBits) /* Exclusive access status. */ \
84 V_(Pt, 3, 0, ExtractBits) /* Load/store register (p0-p7). */ \
85 V_(Pd, 3, 0, ExtractBits) /* SVE destination predicate register. */ \
[all …]
Dinstructions-aarch64.cc76 return (GetRd() != static_cast<int>(ExtractBits(18, 16))) && in CanTakeSVEMovprfx()
82 return (GetRd() != static_cast<int>(ExtractBits(19, 16))) && in CanTakeSVEMovprfx()
544 uint32_t imm_2 = ExtractBits<0x00C00000>(); in GetSVEPermuteIndexAndLaneSizeLog2()
545 uint32_t tsz_5 = ExtractBits<0x001F0000>(); in GetSVEPermuteIndexAndLaneSizeLog2()
558 int index = ExtractBits(20, 19); in GetSVEMulZmAndIndex()
593 index |= ExtractBits(20, 19) << 1; in GetSVEMulLongZmAndIndex()
640 is_predicated ? ExtractBits<0x00C00300>() : ExtractBits<0x00D80000>(); in GetSVEImmShiftAndLaneSizeLog2()
642 is_predicated ? ExtractBits<0x000000E0>() : ExtractBits<0x00070000>(); in GetSVEImmShiftAndLaneSizeLog2()
656 Instr dtype_h = ExtractBits(dtype_h_lsb + 1, dtype_h_lsb); in GetSVEMsizeFromDtype()
664 Instr dtype_l = ExtractBits(dtype_l_lsb + 1, dtype_l_lsb); in GetSVEEsizeFromDtype()
[all …]
Dinstructions-aarch64.h241 uint32_t ExtractBits(int msb, int lsb) const { in ExtractBits() function
245 return ExtractBits(msb, lsb);
270 uint32_t ExtractBits() const { in ExtractBits() function
314 return this->ExtractBits(msb, lsb); in INSTRUCTION_FIELDS_LIST()
408 Float16 GetSVEImmFP16() const { return Imm8ToFloat16(ExtractBits(12, 5)); } in GetSVEImmFP16()
410 float GetSVEImmFP32() const { return Imm8ToFP32(ExtractBits(12, 5)); } in GetSVEImmFP32()
412 double GetSVEImmFP64() const { return Imm8ToFP64(ExtractBits(12, 5)); } in GetSVEImmFP64()
Ddisasm-aarch64.cc2713 switch (instr->ExtractBits(7, 6)) { in Disassembler()
4378 if (instr->ExtractBits(20, 16) != 0) form = form_imm; in Disassembler()
4417 const char *form = (instr->ExtractBits(20, 16) != 0) in Disassembler()
4488 bool is_zero = instr->ExtractBits(20, 16) == 0; in Disassembler()
4716 if (instr->ExtractBits(20, 16) != 0) { in Disassembler()
4717 unsigned msz = instr->ExtractBits(24, 23); in Disassembler()
4841 const char *form = (instr->ExtractBits(20, 16) != 0) in Disassembler()
4969 bool is_zero = instr->ExtractBits(20, 16) == 0; in Disassembler()
5050 unsigned tsize = (instr->ExtractBits(23, 22) << 2) | instr->ExtractBits(9, 8); in Disassembler()
5283 int tsz = instr->ExtractBits(20, 16); in Disassembler()
[all …]
Dsimulator-aarch64.cc2841 index = (instr->ExtractBit(22) << 2) | instr->ExtractBits(20, 19); in Simulator()
2842 zm_code = instr->ExtractBits(18, 16); in Simulator()
2849 index = instr->ExtractBits(20, 19); in Simulator()
2850 zm_code = instr->ExtractBits(18, 16); in Simulator()
2858 zm_code = instr->ExtractBits(19, 16); in Simulator()
2880 SimVRegister& zm = ReadVRegister(instr->ExtractBits(19, 16)); in Simulator()
2939 SimVRegister& zm = ReadVRegister(instr->ExtractBits(18, 16)); in Simulator()
2942 Instr index = (instr->ExtractBits(20, 19) << 1) | instr->ExtractBit(11); in Simulator()
3046 int rot = instr->ExtractBits(11, 10) * 90; in Simulator()
3052 SimVRegister& zm_h = ReadVRegister(instr->ExtractBits(18, 16)); in Simulator()
[all …]
Ddecoder-aarch64.cc204 bit_extract_fn = &Instruction::ExtractBits<0x##M>; \
Dsimulator-aarch64.h919 uint32_t ExtractBits(int msb, int lsb) const { in ExtractBits() function
923 return ExtractBits(msb, lsb);
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPULowerKernelArguments.cpp203 Value *ExtractBits = OffsetDiff == 0 ? in runOnFunction() local
207 Value *Trunc = Builder.CreateTrunc(ExtractBits, ArgIntTy); in runOnFunction()
/third_party/node/deps/v8/src/codegen/riscv64/
Dmacro-assembler-riscv64.h586 void ExtractBits(Register rt, Register rs, uint16_t pos, uint16_t size,
588 void ExtractBits(Register dest, Register source, Register pos, int size,
591 ExtractBits(dest, dest, 0, size, sign_extend);
1306 ExtractBits(dst, src, Field::kShift, Field::kSize); in DecodeField()
Dmacro-assembler-riscv64.cc1770 void TurboAssembler::ExtractBits(Register rt, Register rs, uint16_t pos, in ExtractBits() function in v8::internal::TurboAssembler
2015 ExtractBits(scratch2, scratch, kFloatMantissaBits, kFloatExponentBits); in RoundHelper()
/third_party/node/deps/v8/src/compiler/backend/loong64/
Dcode-generator-loong64.cc367 __ ExtractBits(i.OutputRegister(0), i.TempRegister(1), i.TempRegister(3), \
396 __ ExtractBits(i.OutputRegister(0), i.TempRegister(2), i.TempRegister(1), \
444 __ ExtractBits(i.OutputRegister(0), i.TempRegister(2), i.TempRegister(1), \
446 __ ExtractBits(i.TempRegister(2), i.InputRegister(2), zero_reg, size, \
/third_party/node/deps/v8/src/wasm/baseline/loong64/
Dliftoff-assembler-loong64.h590 ExtractBits(result.gp(), temp1, temp3, size, false); \
704 ExtractBits(result.gp(), temp2, temp1, size, false); \
776 ExtractBits(result.gp(), temp2, temp1, size, false); \
777 ExtractBits(temp2, expected.gp(), zero_reg, size, false); \
/third_party/node/deps/v8/src/wasm/baseline/mips64/
Dliftoff-assembler-mips64.h729 ExtractBits(result.gp(), temp1, temp3, size, false); \
807 ExtractBits(result.gp(), temp2, temp1, size, false); \
880 ExtractBits(result.gp(), temp2, temp1, size, false); \
881 ExtractBits(temp2, expected.gp(), zero_reg, size, false); \
/third_party/node/deps/v8/src/compiler/backend/mips64/
Dcode-generator-mips64.cc371 __ ExtractBits(i.OutputRegister(0), i.TempRegister(1), i.TempRegister(3), \
412 __ ExtractBits(i.OutputRegister(0), i.TempRegister(2), i.TempRegister(1), \
458 __ ExtractBits(i.OutputRegister(0), i.TempRegister(2), i.TempRegister(1), \
460 __ ExtractBits(i.TempRegister(2), i.InputRegister(2), zero_reg, size, \
/third_party/node/deps/v8/src/compiler/backend/riscv64/
Dcode-generator-riscv64.cc357 __ ExtractBits(i.OutputRegister(0), i.TempRegister(1), i.TempRegister(3), \
398 __ ExtractBits(i.OutputRegister(0), i.TempRegister(2), i.TempRegister(1), \
444 __ ExtractBits(i.OutputRegister(0), i.TempRegister(2), i.TempRegister(1), \
446 __ ExtractBits(i.InputRegister(2), i.InputRegister(2), 0, size, \
/third_party/node/deps/v8/src/compiler/backend/mips/
Dcode-generator-mips.cc415 __ ExtractBits(i.OutputRegister(0), i.TempRegister(1), i.TempRegister(3), \
449 __ ExtractBits(i.OutputRegister(0), i.TempRegister(2), i.TempRegister(1), \
487 __ ExtractBits(i.OutputRegister(0), i.TempRegister(2), i.TempRegister(1), \
489 __ ExtractBits(i.InputRegister(2), i.InputRegister(2), zero_reg, size, \
/third_party/node/deps/v8/src/codegen/loong64/
Dmacro-assembler-loong64.h531 void ExtractBits(Register dest, Register source, Register pos, int size,
Dmacro-assembler-loong64.cc2111 void TurboAssembler::ExtractBits(Register dest, Register source, Register pos, in CallRecordWriteStub() function in v8::internal::TurboAssembler
/third_party/vixl/src/
Dutils-vixl.h775 inline Td ExtractBits(Ts value, int least_significant_bit, Td mask) {
/third_party/node/deps/v8/src/codegen/mips64/
Dmacro-assembler-mips64.h618 void ExtractBits(Register dest, Register source, Register pos, int size,
Dmacro-assembler-mips64.cc2035 void TurboAssembler::ExtractBits(Register dest, Register source, Register pos, in CallRecordWriteStub() function in v8::internal::TurboAssembler
/third_party/node/deps/v8/src/codegen/mips/
Dmacro-assembler-mips.h602 void ExtractBits(Register dest, Register source, Register pos, int size,
Dmacro-assembler-mips.cc1710 void TurboAssembler::ExtractBits(Register dest, Register source, Register pos, in CallRecordWriteStub() function in v8::internal::TurboAssembler
/third_party/node/deps/v8/src/wasm/baseline/riscv64/
Dliftoff-assembler-riscv64.h894 ExtractBits(result.gp(), temp2, temp1, size, false); \
895 ExtractBits(temp2, expected.gp(), zero_reg, size, false); \
/third_party/node/deps/v8/src/builtins/riscv64/
Dbuiltins-riscv64.cc3008 __ ExtractBits(result_reg, input_high, HeapNumber::kExponentShift, in Generate_DoubleToI() local

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