/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
D | RISCVFrameLowering.cpp | 116 Register FPReg = getFPReg(STI); in emitPrologue() local 177 if (STI.isRegisterReservedByUser(FPReg)) in emitPrologue() 181 adjustReg(MBB, MBBI, DL, FPReg, SPReg, in emitPrologue() 186 nullptr, RI->getDwarfRegNum(FPReg, true), 0)); in emitPrologue() 250 Register FPReg = getFPReg(STI); in emitEpilogue() local 282 adjustReg(MBB, LastFrameDestroy, DL, SPReg, FPReg, -FPOffset, in emitEpilogue()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | PPCFrameLowering.cpp | 560 unsigned FPReg = is31 ? PPC::R31 : PPC::R1; in replaceFPWithRealFP() local 565 unsigned BPReg = HasBP ? (unsigned) RegInfo->getBaseRegister(MF) : FPReg; in replaceFPWithRealFP() 579 MO.setReg(FPReg); in replaceFPWithRealFP() 833 unsigned FPReg = isPPC64 ? PPC::X31 : PPC::R31; in emitPrologue() local 1010 .addReg(FPReg) in emitPrologue() 1152 .addReg(FPReg, RegState::Kill) // Save FP. in emitPrologue() 1190 .addReg(FPReg) in emitPrologue() 1215 .addReg(FPReg) in emitPrologue() 1257 unsigned Reg = MRI->getDwarfRegNum(FPReg, true); in emitPrologue() 1294 BuildMI(MBB, MBBI, dl, OrInst, FPReg) in emitPrologue() [all …]
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D | PPCFastISel.cpp | 1127 unsigned FPReg = PPCMoveToFPReg(SrcVT, SrcReg, IsSigned); in SelectIToFP() local 1128 if (FPReg == 0) in SelectIToFP() 1143 .addReg(FPReg); in SelectIToFP()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMELFStreamer.cpp | 704 unsigned FPReg; // Frame pointer register member in __anon65e2e86b0111::ARMELFStreamer 1247 FPReg = ARM::SP; in EHReset() 1349 UnwindOpAsm.EmitSetSP(MRI->getEncodingValue(FPReg)); in FlushUnwindOpcodes() 1417 assert((NewSPReg == ARM::SP || NewSPReg == FPReg) && in emitSetFP() 1421 FPReg = NewFPReg; in emitSetFP() 1432 assert(FPReg == ARM::SP && "current FP must be SP"); in emitMovSP() 1436 FPReg = Reg; in emitMovSP() 1440 UnwindOpAsm.EmitSetSP(MRI->getEncodingValue(FPReg)); in emitMovSP()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/ |
D | AArch64AsmBackend.cpp | 612 unsigned FPReg = *MRI.getLLVMRegNum(FPPush.getRegister(), true); in generateCompactUnwindEncoding() local 615 FPReg = getXRegFromWReg(FPReg); in generateCompactUnwindEncoding() 617 assert(LRReg == AArch64::LR && FPReg == AArch64::FP && in generateCompactUnwindEncoding()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86FloatingPoint.cpp | 1610 unsigned FPReg = getFPReg(Op); in handleSpecialFP() local 1616 FPKills |= 1U << FPReg; in handleSpecialFP() 1640 unsigned FPReg = getFPReg(Op); in handleSpecialFP() local 1644 Op.setReg(getSTReg(FPReg)); in handleSpecialFP() 1647 Op.setReg(X86::ST0 + FPReg); in handleSpecialFP() 1664 unsigned FPReg = countTrailingZeros(FPKills); in handleSpecialFP() local 1665 if (isLive(FPReg)) in handleSpecialFP() 1666 freeStackSlotAfter(Inst, FPReg); in handleSpecialFP() 1667 FPKills &= ~(1U << FPReg); in handleSpecialFP()
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D | X86FrameLowering.cpp | 2002 Register FPReg = TRI->getFrameRegister(MF); in assignCalleeSavedSpillSlots() local 2004 if (TRI->regsOverlap(CSI[i].getReg(),FPReg)) { in assignCalleeSavedSpillSlots()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/AsmParser/ |
D | ARMAsmParser.cpp | 117 int FPReg; member in __anon4087fa170111::UnwindContext 120 UnwindContext(MCAsmParser &P) : Parser(P), FPReg(ARM::SP) {} in UnwindContext() 136 void saveFPReg(int Reg) { FPReg = Reg; } in saveFPReg() 137 int getFPReg() const { return FPReg; } in getFPReg() 179 FPReg = ARM::SP; in reset() 11123 int FPReg = tryParseRegister(); in parseDirectiveSetFP() local 11125 if (check(FPReg == -1, FPRegLoc, "frame pointer register expected") || in parseDirectiveSetFP() 11138 UC.saveFPReg(FPReg); in parseDirectiveSetFP() 11162 getTargetStreamer().emitSetFP(static_cast<unsigned>(FPReg), in parseDirectiveSetFP()
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