| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
| D | ConstrainedOps.def | 43 INSTRUCTION(FPExt, 1, 0, experimental_constrained_fpext, FP_EXTEND)
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 610 FP_EXTEND, enumerator
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 1584 case ISD::FP_EXTEND: return visitFP_EXTEND(N); in visit()
9427 CastOpcode == ISD::TRUNCATE || CastOpcode == ISD::FP_EXTEND || in matchVSelectOpSizesWithSetCC()
11579 if (N0.getOpcode() == ISD::FP_EXTEND) { in visitFADDForFMACombine()
11585 DAG.getNode(ISD::FP_EXTEND, SL, VT, in visitFADDForFMACombine()
11587 DAG.getNode(ISD::FP_EXTEND, SL, VT, in visitFADDForFMACombine()
11594 if (N1.getOpcode() == ISD::FP_EXTEND) { in visitFADDForFMACombine()
11600 DAG.getNode(ISD::FP_EXTEND, SL, VT, in visitFADDForFMACombine()
11602 DAG.getNode(ISD::FP_EXTEND, SL, VT, in visitFADDForFMACombine()
11643 DAG.getNode(ISD::FP_EXTEND, SL, VT, U), in visitFADDForFMACombine()
11644 DAG.getNode(ISD::FP_EXTEND, SL, VT, V), in visitFADDForFMACombine()
[all …]
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| D | LegalizeFloatTypes.cpp | 102 case ISD::FP_EXTEND: R = SoftenFloatRes_FP_EXTEND(N); break; in SoftenFloatResult()
488 Op = DAG.getNode(ISD::FP_EXTEND, SDLoc(N), MVT::f32, Op); in SoftenFloatRes_FP_EXTEND()
677 auto ExtendNode = DAG.getNode(ISD::FP_EXTEND, dl, VT, NewL); in SoftenFloatRes_LOAD()
1164 case ISD::FP_EXTEND: ExpandFloatRes_FP_EXTEND(N, Lo, Hi); break; in ExpandFloatResult()
1436 Hi = DAG.getNode(ISD::FP_EXTEND, dl, NVT, N->getOperand(0)); in ExpandFloatRes_FP_EXTEND()
1974 case ISD::FP_EXTEND: R = PromoteFloatOp_FP_EXTEND(N, OpNo); break; in PromoteFloatOperand()
2026 return DAG.getNode(ISD::FP_EXTEND, SDLoc(N), VT, Op); in PromoteFloatOp_FP_EXTEND()
2375 ISD::FP_EXTEND, DL, NVT, in PromoteFloatRes_XINT_TO_FP()
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| D | LegalizeDAG.cpp | 2921 case ISD::FP_EXTEND: in ExpandNode()
3219 DAG.getNode(ISD::FP_EXTEND, dl, Node->getValueType(0), Res)); in ExpandNode()
4388 ExtOp = ISD::FP_EXTEND; in PromoteNode()
4420 unsigned ExtOp = ISD::FP_EXTEND; in PromoteNode()
4433 unsigned ExtOp = ISD::FP_EXTEND; in PromoteNode()
4454 Tmp1 = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(0)); in PromoteNode()
4455 Tmp2 = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(1)); in PromoteNode()
4477 Tmp1 = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(0)); in PromoteNode()
4478 Tmp2 = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(1)); in PromoteNode()
4479 Tmp3 = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(2)); in PromoteNode()
[all …]
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| D | LegalizeVectorOps.cpp | 436 case ISD::FP_EXTEND: in LegalizeOp()
574 case ISD::FP_EXTEND: in Promote()
599 Operands[j] = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(j)); in Promote()
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| D | SelectionDAGDumper.cpp | 330 case ISD::FP_EXTEND: return "fp_extend"; in getOperationName()
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| D | LegalizeVectorTypes.cpp | 91 case ISD::FP_EXTEND: in ScalarizeVectorResult()
695 ? DAG.getNode(ISD::FP_EXTEND, SDLoc(N), VT, Res) in ScalarizeVecOp_EXTRACT_VECTOR_ELT()
884 case ISD::FP_EXTEND: in SplitVectorResult()
1969 case ISD::FP_EXTEND: in SplitVectorOperand()
2792 case ISD::FP_EXTEND: in WidenVectorResult()
4209 case ISD::FP_EXTEND: in WidenVectorOperand()
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| D | SelectionDAG.cpp | 337 return IsFP ? ISD::FP_EXTEND : ISD::ANY_EXTEND; in getExtForLoadExtType()
1124 ? getNode(ISD::FP_EXTEND, DL, VT, Op) in getFPExtendOrRound()
4129 case ISD::FP_EXTEND: in isKnownNeverNaN()
4481 case ISD::FP_EXTEND: { in getNode()
4532 case ISD::FP_EXTEND: in getNode()
4571 case ISD::FP_EXTEND: in getNode()
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| D | TargetLowering.cpp | 5493 if (!Op.hasOneUse() && !(Op.getOpcode() == ISD::FP_EXTEND && in isNegatibleForFree()
5588 case ISD::FP_EXTEND: in isNegatibleForFree()
5712 case ISD::FP_EXTEND: in getNegatedExpression()
6699 Result = DAG.getNode(VT.isFloatingPoint() ? ISD::FP_EXTEND : in expandUnalignedLoad()
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| D | SelectionDAGBuilder.cpp | 328 return DAG.getNode(ISD::FP_EXTEND, DL, ValueVT, Val); in getCopyFromParts()
534 Val = DAG.getNode(ISD::FP_EXTEND, DL, PartVT, Val); in getCopyToParts()
3458 setValue(&I, DAG.getNode(ISD::FP_EXTEND, getCurSDLoc(), DestVT, N)); in visitFPExt()
6292 setValue(&I, DAG.getNode(ISD::FP_EXTEND, sdl, in visitIntrinsicCall()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMTargetTransformInfo.cpp | 162 { ISD::FP_EXTEND, MVT::v2f32, 2 }, in getCastInstrCost()
163 { ISD::FP_EXTEND, MVT::v4f32, 4 } in getCastInstrCost()
167 ISD == ISD::FP_EXTEND)) { in getCastInstrCost()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 280 setOperationAction(ISD::FP_EXTEND, MVT::f128, Custom); in AArch64TargetLowering()
502 setOperationAction(ISD::FP_EXTEND, MVT::v8f16, Expand); in AArch64TargetLowering()
729 setOperationAction(ISD::FP_EXTEND, MVT::v1f64, Expand); in AArch64TargetLowering()
1715 LHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f32, LHS); in emitComparison()
1716 RHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f32, RHS); in emitComparison()
1816 LHS = DAG.getNode(ISD::FP_EXTEND, DL, MVT::f32, LHS); in emitConditionalComparison()
1817 RHS = DAG.getNode(ISD::FP_EXTEND, DL, MVT::f32, RHS); in emitConditionalComparison()
2566 DAG.getNode(ISD::FP_EXTEND, dl, NewVT, Op.getOperand(0))); in LowerVectorFP_TO_INT()
2582 SDValue Ext = DAG.getNode(ISD::FP_EXTEND, dl, ExtVT, Op.getOperand(0)); in LowerVectorFP_TO_INT()
2604 DAG.getNode(ISD::FP_EXTEND, dl, MVT::f32, SrcVal)); in LowerFP_TO_INT()
[all …]
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| D | AArch64ISelDAGToDAG.cpp | 1835 assert(N->getOpcode() == ISD::FP_EXTEND); in tryHighFPExt()
3093 case ISD::FP_EXTEND: in Select()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 916 setOperationAction(ISD::FP_EXTEND, MVT::f128, Legal); in PPCTargetLowering()
948 setOperationAction(ISD::FP_EXTEND, MVT::v2f32, Custom); in PPCTargetLowering()
1000 setOperationAction(ISD::FP_EXTEND, MVT::v4f64, Legal); in PPCTargetLowering()
7616 LHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, LHS); in LowerSELECT_CC()
7619 Sel1 = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Sel1); in LowerSELECT_CC()
7629 LHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, LHS); in LowerSELECT_CC()
7638 LHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, LHS); in LowerSELECT_CC()
7652 Cmp = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Cmp); in LowerSELECT_CC()
7655 Sel1 = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Sel1); in LowerSELECT_CC()
7662 Cmp = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Cmp); in LowerSELECT_CC()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 286 setOperationAction(ISD::FP_EXTEND, MVT::v4f32, Expand); in SITargetLowering()
585 setOperationAction(ISD::FP_EXTEND, MVT::v2f32, Expand); in SITargetLowering()
2812 Arg = DAG.getNode(ISD::FP_EXTEND, DL, VA.getLocVT(), Arg); in LowerCall()
4256 Src0 = DAG.getNode(ISD::FP_EXTEND, SL, MVT::f32, Src0); in lowerFCMPIntrinsic()
4257 Src1 = DAG.getNode(ISD::FP_EXTEND, SL, MVT::f32, Src1); in lowerFCMPIntrinsic()
4585 DAG.getNode(ISD::FP_EXTEND, DL, VT, Op) : in getFPExtOrFPTrunc()
7644 SDValue CvtSrc0 = DAG.getNode(ISD::FP_EXTEND, SL, MVT::f32, Src0); in LowerFDIV16()
7645 SDValue CvtSrc1 = DAG.getNode(ISD::FP_EXTEND, SL, MVT::f32, Src1); in LowerFDIV16()
8772 case ISD::FP_EXTEND: in isCanonicalized()
9760 Op1.getOpcode() != ISD::FP_EXTEND || in performFMACombine()
[all …]
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| D | AMDGPUISelLowering.cpp | 2719 SDValue FPExtend = DAG.getNode(ISD::FP_EXTEND, DL, MVT::f32, Src); in LowerFP_TO_SINT()
2742 SDValue FPExtend = DAG.getNode(ISD::FP_EXTEND, DL, MVT::f32, Src); in LowerFP_TO_UINT()
3805 case ISD::FP_EXTEND: in performFNegCombine()
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| D | AMDGPUISelDAGToDAG.cpp | 2577 if (Src.getOpcode() == ISD::FP_EXTEND) { in SelectVOP3PMadMixModsImpl()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86TargetTransformInfo.cpp | 1336 { ISD::FP_EXTEND, MVT::v8f64, MVT::v8f32, 1 }, in getCastInstrCost()
1337 { ISD::FP_EXTEND, MVT::v8f64, MVT::v16f32, 3 }, in getCastInstrCost()
1435 { ISD::FP_EXTEND, MVT::v8f64, MVT::v8f32, 3 }, in getCastInstrCost()
1516 { ISD::FP_EXTEND, MVT::v4f64, MVT::v4f32, 1 }, in getCastInstrCost()
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| D | X86IntrinsicsInfo.h | 507 ISD::FP_EXTEND, X86ISD::VFPEXT_SAE),
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| D | X86ISelDAGToDAG.cpp | 1035 case ISD::FP_EXTEND: in PreprocessISelDAG()
1055 if (N->getOpcode() == ISD::FP_EXTEND) in PreprocessISelDAG()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1716 setOperationAction(ISD::FP_EXTEND, MVT::f128, Legal); in SparcTargetLowering()
1744 setOperationAction(ISD::FP_EXTEND, MVT::f128, Custom); in SparcTargetLowering()
3050 case ISD::FP_EXTEND: return LowerF128_FPEXTEND(Op, DAG, *this); in LowerOperation()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 1628 case FPExt: return ISD::FP_EXTEND; in InstructionOpcodeToISD()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 475 def fpextend : SDNode<"ISD::FP_EXTEND" , SDTFPExtendOp>;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/ |
| D | PPCGenFastISel.inc | 672 // FastEmit functions for ISD::FP_EXTEND.
1705 case ISD::FP_EXTEND: return fastEmit_ISD_FP_EXTEND_r(VT, RetVT, Op0, Op0IsKill);
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