| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
| D | ConstrainedOps.def | 82 FUNCTION(trunc, 1, 0, experimental_constrained_trunc, FTRUNC)
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 642 FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR, enumerator
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| D | BasicTTIImpl.h | 1269 ISDs.push_back(ISD::FTRUNC);
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCTargetTransformInfo.cpp | 314 case Intrinsic::trunc: Opcode = ISD::FTRUNC; break; in mightUseCTR()
384 Opcode = ISD::FTRUNC; break; in mightUseCTR()
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| D | PPCISelLowering.cpp | 239 setOperationAction(ISD::FTRUNC, MVT::ppcf128, Expand); in PPCTargetLowering()
315 setOperationAction(ISD::FTRUNC, MVT::f64, Legal); in PPCTargetLowering()
320 setOperationAction(ISD::FTRUNC, MVT::f32, Legal); in PPCTargetLowering()
654 setOperationAction(ISD::FTRUNC, VT, Expand); in PPCTargetLowering()
715 setOperationAction(ISD::FTRUNC, MVT::v4f32, Legal); in PPCTargetLowering()
794 setOperationAction(ISD::FTRUNC, MVT::v2f64, Legal); in PPCTargetLowering()
928 setOperationAction(ISD::FTRUNC, MVT::f128, Legal); in PPCTargetLowering()
1092 setOperationAction(ISD::FTRUNC, MVT::v4f64, Legal); in PPCTargetLowering()
1097 setOperationAction(ISD::FTRUNC, MVT::v4f32, Legal); in PPCTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 257 setOperationAction(ISD::FTRUNC, MVT::f32, Legal); in AMDGPUTargetLowering()
418 setOperationAction(ISD::FTRUNC, VT, Expand); in AMDGPUTargetLowering()
523 case ISD::FTRUNC: in fnegFoldsIntoOp()
1137 case ISD::FTRUNC: return LowerFTRUNC(Op, DAG); in LowerOperation()
1582 fq = DAG.getNode(ISD::FTRUNC, DL, FltVT, fq); in LowerDIVREM24()
1690 SDValue Trunc = DAG.getNode(ISD::FTRUNC, DL, MVT::f32, Mul2); in LowerUDIVREM64()
2033 SDValue Floor = DAG.getNode(ISD::FTRUNC, SL, VT, Div); in LowerFREM()
2047 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, MVT::f64, Src); in LowerFCEIL()
2173 SDValue T = DAG.getNode(ISD::FTRUNC, SL, VT, X); in LowerFROUND_LegalFTRUNC()
2257 if (isOperationLegal(ISD::FTRUNC, VT)) in LowerFROUND()
[all …]
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| D | R600ISelLowering.cpp | 157 setOperationAction(ISD::FTRUNC, MVT::f64, Custom); in R600TargetLowering()
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| D | SIISelLowering.cpp | 429 setOperationAction(ISD::FTRUNC, MVT::f64, Legal); in SITargetLowering()
434 setOperationAction(ISD::FTRUNC, MVT::f64, Custom); in SITargetLowering()
4586 DAG.getNode(ISD::FTRUNC, DL, VT, Op); in getFPExtOrFPTrunc()
8617 case ISD::FTRUNC: in fp16SrcZerosHighBits()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 550 ISD::FTRUNC}) { in NVPTXTargetLowering()
2117 SDValue RoundedA = DAG.getNode(ISD::FTRUNC, SL, VT, AdjustedA); in LowerFROUND32()
2129 SDValue RoundedAForSmallA = DAG.getNode(ISD::FTRUNC, SL, VT, A); in LowerFROUND32()
2149 SDValue RoundedA = DAG.getNode(ISD::FTRUNC, SL, VT, AdjustedA); in LowerFROUND64()
2161 DAG.getNode(ISD::FTRUNC, SL, VT, A); in LowerFROUND64()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 201 case ISD::FTRUNC: return "ftrunc"; in getOperationName()
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| D | LegalizeFloatTypes.cpp | 123 case ISD::FTRUNC: R = SoftenFloatRes_FTRUNC(N); break; in SoftenFloatResult()
1180 case ISD::FTRUNC: ExpandFloatRes_FTRUNC(N, Lo, Hi); break; in ExpandFloatResult()
2122 case ISD::FTRUNC: in PromoteFloatResult()
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| D | LegalizeVectorTypes.cpp | 98 case ISD::FTRUNC: in ScalarizeVectorResult()
892 case ISD::FTRUNC: in SplitVectorResult()
1973 case ISD::FTRUNC: in SplitVectorOperand()
2818 case ISD::FTRUNC: { in WidenVectorResult()
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| D | LegalizeVectorOps.cpp | 430 case ISD::FTRUNC: in LegalizeOp()
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| D | DAGCombiner.cpp | 1593 case ISD::FTRUNC: return visitFTRUNC(N); in visit()
13020 if (!TLI.isOperationLegal(ISD::FTRUNC, VT) || in foldFPToIntToFP()
13029 return DAG.getNode(ISD::FTRUNC, SDLoc(N), VT, N0.getOperand(0)); in foldFPToIntToFP()
13033 return DAG.getNode(ISD::FTRUNC, SDLoc(N), VT, N0.getOperand(0)); in foldFPToIntToFP()
13343 return DAG.getNode(ISD::FTRUNC, SDLoc(N), VT, N0); in visitFTRUNC()
13351 case ISD::FTRUNC: in visitFTRUNC()
14148 TLI.isOperationLegal(ISD::FTRUNC, STMemType)) { in getTruncatedStoreValue()
14149 Val = DAG.getNode(ISD::FTRUNC, SDLoc(ST), STMemType, Val); in getTruncatedStoreValue()
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| D | LegalizeDAG.cpp | 4001 case ISD::FTRUNC: in ConvertNodeToLibcall()
4506 case ISD::FTRUNC: in PromoteNode()
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| D | SelectionDAG.cpp | 4111 case ISD::FTRUNC: in isKnownNeverNaN()
4469 case ISD::FTRUNC: { in getNode()
4530 case ISD::FTRUNC: in getNode()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 99 {ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FNEARBYINT, ISD::FRINT}) in WebAssemblyTargetLowering()
192 for (auto Op : {ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FNEARBYINT, in WebAssemblyTargetLowering()
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| /third_party/mesa3d/src/broadcom/compiler/ |
| D | v3d_compiler.h | 1377 VIR_A_ALU1(FTRUNC) in VIR_A_ALU2()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 273 setOperationAction(ISD::FTRUNC, MVT::f128, Expand); in AArch64TargetLowering()
451 setOperationAction(ISD::FTRUNC, MVT::f16, Promote); in AArch64TargetLowering()
475 setOperationAction(ISD::FTRUNC, MVT::v4f16, Expand); in AArch64TargetLowering()
497 setOperationAction(ISD::FTRUNC, MVT::v8f16, Expand); in AArch64TargetLowering()
511 setOperationAction(ISD::FTRUNC, Ty, Legal); in AArch64TargetLowering()
528 setOperationAction(ISD::FTRUNC, MVT::f16, Legal); in AArch64TargetLowering()
724 setOperationAction(ISD::FTRUNC, MVT::v1f64, Expand); in AArch64TargetLowering()
835 setOperationAction(ISD::FTRUNC, Ty, Legal); in AArch64TargetLowering()
845 setOperationAction(ISD::FTRUNC, Ty, Legal); in AArch64TargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 754 setOperationAction(ISD::FTRUNC, VT, Expand); in initActions()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 902 case ISD::FTRUNC: in PreprocessISelDAG()
918 case ISD::FTRUNC: Imm = 0xB; break; in PreprocessISelDAG()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 452 setOperationAction(ISD::FTRUNC, VT, Legal); in SystemZTargetLowering()
509 setOperationAction(ISD::FTRUNC, MVT::v2f64, Legal); in SystemZTargetLowering()
541 setOperationAction(ISD::FTRUNC, MVT::v4f32, Legal); in SystemZTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 463 def ftrunc : SDNode<"ISD::FTRUNC" , SDTFPUnaryOp>;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/ |
| D | PPCGenFastISel.inc | 961 // FastEmit functions for ISD::FTRUNC.
1711 case ISD::FTRUNC: return fastEmit_ISD_FTRUNC_r(VT, RetVT, Op0, Op0IsKill);
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 807 setOperationAction(ISD::FTRUNC, MVT::v2f64, Expand); in ARMTargetLowering()
827 setOperationAction(ISD::FTRUNC, MVT::v4f32, Expand); in ARMTargetLowering()
843 setOperationAction(ISD::FTRUNC, MVT::v2f32, Expand); in ARMTargetLowering()
972 setOperationAction(ISD::FTRUNC, MVT::f64, Expand); in ARMTargetLowering()
1379 setOperationAction(ISD::FTRUNC, MVT::f32, Legal); in ARMTargetLowering()
1395 setOperationAction(ISD::FTRUNC, MVT::f64, Legal); in ARMTargetLowering()
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