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Searched refs:GIR_BuildMI (Results 1 – 6 of 6) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/
DARMGenGlobalISel.inc920 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::UXTAB,
944 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::UXTAH,
968 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::t2UXTAB,
992 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::t2UXTAH,
1016 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::UXTAB,
1040 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::UXTAH,
1064 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::t2UXTAB,
1088 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::t2UXTAH,
1124 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::SMLATT,
1160 GIR_BuildMI, /*InsnID*/0, /*Opcode*/ARM::t2SMLATT,
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenGlobalISel.inc1237 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDWri,
1251 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDWri,
1265 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDWrx,
1279 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUBSWri,
1293 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDWrx,
1307 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUBSWri,
1321 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDWrs,
1335 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDWrs,
1378 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDPv2i64p,
1403 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDPv2i64p,
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/
DMipsGenGlobalISel.inc758 GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::LSA,
785 GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::LSA,
806 GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::ADDiu,
826 GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::ADDIUR2_MM,
846 GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::ADDIUS5_MM,
934 GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::DLSA,
960 GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::DLSA,
1013 GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::MADDV_D,
1034 GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::MADDV_D,
1087 GIR_BuildMI, /*InsnID*/0, /*Opcode*/Mips::MADDV_W,
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenGlobalISel.inc867 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INC8r,
879 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DEC8r,
894 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD8ri,
924 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB16ri8,
937 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INC16r,
949 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DEC16r,
965 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD16ri8,
981 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD16ri,
1011 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB32ri8,
1024 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INC32r,
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/
DInstructionSelector.h255 GIR_BuildMI, enumerator
DInstructionSelectorImpl.h767 case GIR_BuildMI: { in executeMatchTable()